Changes in kernel/arch/ia64/include/asm.h [5bda2f3e:a1d89ad] in mainline
- File:
-
- 1 edited
-
kernel/arch/ia64/include/asm.h (modified) (25 diffs)
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia64/include/asm.h
r5bda2f3e ra1d89ad 27 27 */ 28 28 29 /** @addtogroup ia64 29 /** @addtogroup ia64 30 30 * @{ 31 31 */ … … 41 41 #include <arch/register.h> 42 42 43 #define IA64_IOSPACE_ADDRESS 43 #define IA64_IOSPACE_ADDRESS 0xE001000000000000ULL 44 44 45 45 static inline void pio_write_8(ioport8_t *port, uint8_t v) 46 46 { 47 47 uintptr_t prt = (uintptr_t) port; 48 49 *((ioport8_t *) 48 49 *((ioport8_t *)(IA64_IOSPACE_ADDRESS + 50 50 ((prt & 0xfff) | ((prt >> 2) << 12)))) = v; 51 52 asm volatile ( 53 "mf\n" 54 ::: "memory" 55 ); 51 52 asm volatile ("mf\n" ::: "memory"); 56 53 } 57 54 … … 59 56 { 60 57 uintptr_t prt = (uintptr_t) port; 61 62 *((ioport16_t *) 58 59 *((ioport16_t *)(IA64_IOSPACE_ADDRESS + 63 60 ((prt & 0xfff) | ((prt >> 2) << 12)))) = v; 64 65 asm volatile ( 66 "mf\n" 67 ::: "memory" 68 ); 61 62 asm volatile ("mf\n" ::: "memory"); 69 63 } 70 64 … … 72 66 { 73 67 uintptr_t prt = (uintptr_t) port; 74 75 *((ioport32_t *) 68 69 *((ioport32_t *)(IA64_IOSPACE_ADDRESS + 76 70 ((prt & 0xfff) | ((prt >> 2) << 12)))) = v; 77 78 asm volatile ( 79 "mf\n" 80 ::: "memory" 81 ); 71 72 asm volatile ("mf\n" ::: "memory"); 82 73 } 83 74 … … 85 76 { 86 77 uintptr_t prt = (uintptr_t) port; 87 88 asm volatile ( 89 "mf\n" 90 ::: "memory" 91 ); 92 93 return *((ioport8_t *) (IA64_IOSPACE_ADDRESS + 78 79 asm volatile ("mf\n" ::: "memory"); 80 81 return *((ioport8_t *)(IA64_IOSPACE_ADDRESS + 94 82 ((prt & 0xfff) | ((prt >> 2) << 12)))); 95 83 } … … 98 86 { 99 87 uintptr_t prt = (uintptr_t) port; 100 101 asm volatile ( 102 "mf\n" 103 ::: "memory" 104 ); 105 106 return *((ioport16_t *) (IA64_IOSPACE_ADDRESS + 88 89 asm volatile ("mf\n" ::: "memory"); 90 91 return *((ioport16_t *)(IA64_IOSPACE_ADDRESS + 107 92 ((prt & 0xfff) | ((prt >> 2) << 12)))); 108 93 } … … 111 96 { 112 97 uintptr_t prt = (uintptr_t) port; 113 114 asm volatile ( 115 "mf\n" 116 ::: "memory" 117 ); 118 119 return *((ioport32_t *) (IA64_IOSPACE_ADDRESS + 98 99 asm volatile ("mf\n" ::: "memory"); 100 101 return *((ioport32_t *)(IA64_IOSPACE_ADDRESS + 120 102 ((prt & 0xfff) | ((prt >> 2) << 12)))); 121 103 } … … 130 112 { 131 113 uint64_t v; 132 133 /* I'm not sure why but this code bad inlines in scheduler, 134 so THE shifts about 16B and causes kernel panic 135 136 asm volatile ( 137 "and %[value] = %[mask], r12" 138 : [value] "=r" (v) 139 : [mask] "r" (~(STACK_SIZE - 1)) 140 ); 141 return v; 142 143 This code have the same meaning but inlines well. 144 */ 145 146 asm volatile ( 147 "mov %[value] = r12" 148 : [value] "=r" (v) 149 ); 150 151 return (v & (~(STACK_SIZE - 1))); 114 115 //I'm not sure why but this code bad inlines in scheduler, 116 //so THE shifts about 16B and causes kernel panic 117 //asm volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1))); 118 //return v; 119 120 //this code have the same meaning but inlines well 121 asm volatile ("mov %0 = r12" : "=r" (v) ); 122 return v & (~(STACK_SIZE-1)); 152 123 } 153 124 … … 160 131 uint64_t v; 161 132 162 asm volatile ( 163 "mov %[value] = psr\n" 164 : [value] "=r" (v) 165 ); 133 asm volatile ("mov %0 = psr\n" : "=r" (v)); 166 134 167 135 return v; … … 176 144 uint64_t v; 177 145 178 asm volatile ( 179 "mov %[value] = cr.iva\n" 180 : [value] "=r" (v) 181 ); 146 asm volatile ("mov %0 = cr.iva\n" : "=r" (v)); 182 147 183 148 return v; … … 190 155 static inline void iva_write(uint64_t v) 191 156 { 192 asm volatile ( 193 "mov cr.iva = %[value]\n" 194 :: [value] "r" (v) 195 ); 157 asm volatile ("mov cr.iva = %0\n" : : "r" (v)); 196 158 } 197 159 … … 205 167 uint64_t v; 206 168 207 asm volatile ( 208 "mov %[value] = cr.ivr\n" 209 : [value] "=r" (v) 210 ); 169 asm volatile ("mov %0 = cr.ivr\n" : "=r" (v)); 211 170 212 171 return v; … … 217 176 uint64_t v; 218 177 219 asm volatile ( 220 "mov %[value] = cr64\n" 221 : [value] "=r" (v) 222 ); 178 asm volatile ("mov %0 = cr64\n" : "=r" (v)); 223 179 224 180 return v; … … 232 188 static inline void itc_write(uint64_t v) 233 189 { 234 asm volatile ( 235 "mov ar.itc = %[value]\n" 236 :: [value] "r" (v) 237 ); 190 asm volatile ("mov ar.itc = %0\n" : : "r" (v)); 238 191 } 239 192 … … 246 199 uint64_t v; 247 200 248 asm volatile ( 249 "mov %[value] = ar.itc\n" 250 : [value] "=r" (v) 251 ); 201 asm volatile ("mov %0 = ar.itc\n" : "=r" (v)); 252 202 253 203 return v; … … 260 210 static inline void itm_write(uint64_t v) 261 211 { 262 asm volatile ( 263 "mov cr.itm = %[value]\n" 264 :: [value] "r" (v) 265 ); 212 asm volatile ("mov cr.itm = %0\n" : : "r" (v)); 266 213 } 267 214 … … 274 221 uint64_t v; 275 222 276 asm volatile ( 277 "mov %[value] = cr.itm\n" 278 : [value] "=r" (v) 279 ); 223 asm volatile ("mov %0 = cr.itm\n" : "=r" (v)); 280 224 281 225 return v; … … 290 234 uint64_t v; 291 235 292 asm volatile ( 293 "mov %[value] = cr.itv\n" 294 : [value] "=r" (v) 295 ); 236 asm volatile ("mov %0 = cr.itv\n" : "=r" (v)); 296 237 297 238 return v; … … 304 245 static inline void itv_write(uint64_t v) 305 246 { 306 asm volatile ( 307 "mov cr.itv = %[value]\n" 308 :: [value] "r" (v) 309 ); 247 asm volatile ("mov cr.itv = %0\n" : : "r" (v)); 310 248 } 311 249 … … 316 254 static inline void eoi_write(uint64_t v) 317 255 { 318 asm volatile ( 319 "mov cr.eoi = %[value]\n" 320 :: [value] "r" (v) 321 ); 256 asm volatile ("mov cr.eoi = %0\n" : : "r" (v)); 322 257 } 323 258 … … 329 264 { 330 265 uint64_t v; 331 332 asm volatile ( 333 "mov %[value] = cr.tpr\n" 334 : [value] "=r" (v) 335 ); 266 267 asm volatile ("mov %0 = cr.tpr\n" : "=r" (v)); 336 268 337 269 return v; … … 344 276 static inline void tpr_write(uint64_t v) 345 277 { 346 asm volatile ( 347 "mov cr.tpr = %[value]\n" 348 :: [value] "r" (v) 349 ); 278 asm volatile ("mov cr.tpr = %0\n" : : "r" (v)); 350 279 } 351 280 … … 362 291 363 292 asm volatile ( 364 "mov % [value]= psr\n"365 "rsm % [mask]\n"366 : [value]"=r" (v)367 : [mask]"i" (PSR_I_MASK)293 "mov %0 = psr\n" 294 "rsm %1\n" 295 : "=r" (v) 296 : "i" (PSR_I_MASK) 368 297 ); 369 298 … … 383 312 384 313 asm volatile ( 385 "mov % [value]= psr\n"386 "ssm % [mask]\n"314 "mov %0 = psr\n" 315 "ssm %1\n" 387 316 ";;\n" 388 317 "srlz.d\n" 389 : [value]"=r" (v)390 : [mask]"i" (PSR_I_MASK)318 : "=r" (v) 319 : "i" (PSR_I_MASK) 391 320 ); 392 321 … … 420 349 static inline void pk_disable(void) 421 350 { 422 asm volatile ( 423 "rsm %[mask]\n" 424 :: [mask] "i" (PSR_PK_MASK) 425 ); 351 asm volatile ("rsm %0\n" : : "i" (PSR_PK_MASK)); 426 352 } 427 353
Note:
See TracChangeset
for help on using the changeset viewer.
