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  • kernel/genarch/src/mm/page_pt.c

    rde73242 ra2789d2  
    4343#include <arch/mm/page.h>
    4444#include <arch/mm/as.h>
    45 #include <arch/barrier.h>
    4645#include <typedefs.h>
    4746#include <arch/asm.h>
     
    4948#include <align.h>
    5049#include <macros.h>
    51 #include <bitops.h>
    5250
    5351static void pt_mapping_insert(as_t *, uintptr_t, uintptr_t, unsigned int);
     
    8785                SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page), KA2PA(newpt));
    8886                SET_PTL1_FLAGS(ptl0, PTL0_INDEX(page),
    89                     PAGE_NOT_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE |
     87                    PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE |
    9088                    PAGE_WRITE);
    91                 /*
    92                  * Make sure that a concurrent hardware page table walk or
    93                  * pt_mapping_find() will see the new PTL1 only after it is
    94                  * fully initialized.
    95                  */
    96                 write_barrier();
    97                 SET_PTL1_PRESENT(ptl0, PTL0_INDEX(page));
    9889        }
    9990       
     
    10697                SET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page), KA2PA(newpt));
    10798                SET_PTL2_FLAGS(ptl1, PTL1_INDEX(page),
    108                     PAGE_NOT_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE |
     99                    PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE |
    109100                    PAGE_WRITE);
    110                 /*
    111                  * Make the new PTL2 visible only after it is fully initialized.
    112                  */
    113                 write_barrier();
    114                 SET_PTL2_PRESENT(ptl1, PTL1_INDEX(page));       
    115101        }
    116102       
     
    123109                SET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page), KA2PA(newpt));
    124110                SET_PTL3_FLAGS(ptl2, PTL2_INDEX(page),
    125                     PAGE_NOT_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE |
     111                    PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE |
    126112                    PAGE_WRITE);
    127                 /*
    128                  * Make the new PTL3 visible only after it is fully initialized.
    129                  */
    130                 write_barrier();
    131                 SET_PTL3_PRESENT(ptl2, PTL2_INDEX(page));
    132113        }
    133114       
     
    135116       
    136117        SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(page), frame);
    137         SET_FRAME_FLAGS(ptl3, PTL3_INDEX(page), flags | PAGE_NOT_PRESENT);
    138         /*
    139          * Make the new mapping visible only after it is fully initialized.
    140          */
    141         write_barrier();
    142         SET_FRAME_PRESENT(ptl3, PTL3_INDEX(page));
     118        SET_FRAME_FLAGS(ptl3, PTL3_INDEX(page), flags);
    143119}
    144120
     
    302278        if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT)
    303279                return NULL;
    304 
    305         read_barrier();
    306280       
    307281        pte_t *ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
    308282        if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT)
    309283                return NULL;
    310 
    311 #if (PTL1_ENTRIES != 0)
    312         /*
    313          * Always read ptl2 only after we are sure it is present.
    314          */
    315         read_barrier();
    316 #endif
    317284       
    318285        pte_t *ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
    319286        if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT)
    320287                return NULL;
    321 
    322 #if (PTL2_ENTRIES != 0)
    323         /*
    324          * Always read ptl3 only after we are sure it is present.
    325          */
    326         read_barrier();
    327 #endif
    328288       
    329289        pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
    330290       
    331291        return &ptl3[PTL3_INDEX(page)];
    332 }
    333 
    334 /** Return the size of the region mapped by a single PTL0 entry.
    335  *
    336  * @return Size of the region mapped by a single PTL0 entry.
    337  */
    338 static uintptr_t ptl0_step_get(void)
    339 {
    340         size_t va_bits;
    341 
    342         va_bits = fnzb(PTL0_ENTRIES) + fnzb(PTL1_ENTRIES) + fnzb(PTL2_ENTRIES) +
    343             fnzb(PTL3_ENTRIES) + PAGE_WIDTH;
    344 
    345         return 1UL << (va_bits - fnzb(PTL0_ENTRIES));
    346292}
    347293
     
    363309{
    364310        uintptr_t ptl0 = PA2KA((uintptr_t) AS_KERNEL->genarch.page_table);
    365         uintptr_t ptl0_step = ptl0_step_get();
     311        uintptr_t ptl0step = (((uintptr_t) -1) / PTL0_ENTRIES) + 1;
    366312        size_t order;
    367313        uintptr_t addr;
     
    375321#endif
    376322
     323        ASSERT(ispwr2(ptl0step));
    377324        ASSERT(size > 0);
    378325
    379         for (addr = ALIGN_DOWN(base, ptl0_step); addr - 1 < base + size - 1;
    380             addr += ptl0_step) {
     326        for (addr = ALIGN_DOWN(base, ptl0step); addr - 1 < base + size - 1;
     327            addr += ptl0step) {
    381328                uintptr_t l1;
    382329
     
    385332                SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(addr), KA2PA(l1));
    386333                SET_PTL1_FLAGS(ptl0, PTL0_INDEX(addr),
    387                     PAGE_PRESENT | PAGE_USER | PAGE_CACHEABLE |
    388                     PAGE_EXEC | PAGE_WRITE | PAGE_READ);
     334                    PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE |
     335                    PAGE_WRITE);
    389336        }
    390337}
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