Changeset a38b705 in mainline
- Timestamp:
- 2018-05-22T19:06:50Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- f175d22
- Parents:
- c72cd20
- git-author:
- Jakub Jermar <jakub@…> (2018-04-23 20:58:42)
- git-committer:
- Jakub Jermar <jakub@…> (2018-05-22 19:06:50)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/lib/virtio/virtio-pci.h
rc72cd20 ra38b705 49 49 #define VIRTIO_PCI_CAP_PCI_CFG 5 50 50 51 #define VIRTIO_DEV_STATUS_RESET 0 52 #define VIRTIO_DEV_STATUS_ACKNOWLEDGE 1 53 #define VIRTIO_DEV_STATUS_DRIVER 2 54 #define VIRTIO_DEV_STATUS_DRIVER_OK 4 55 #define VIRTIO_DEV_STATUS_FEATURES_OK 8 56 #define VIRTIO_DEV_STATUS_DEVICE_NEEDS_RESET 64 57 #define VIRTIO_DEV_STATUS_FAILED 128 58 51 59 /** Common configuration structure layout according to VIRTIO v1. */ 52 60 typedef struct virtio_pci_common_cfg {
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