Changeset a640bc1 in mainline for kernel/arch/arm32/include/security_ext.h
- Timestamp:
- 2013-01-18T20:06:55Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 660e8fa
- Parents:
- cd8db93
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/include/security_ext.h
rcd8db93 ra640bc1 40 40 #include <arch/regutils.h> 41 41 42 /** Test whether the current cpu supports security extensions. 43 * return true if security extensions are supported, false otherwise. 44 * @note The Processor Feature Register 1 that provides this information 45 * is available only on armv7+. This function returns false on all\ 46 * older archs. 47 */ 42 48 static inline bool sec_ext_is_implemented() 43 49 { … … 49 55 } 50 56 57 /** Test whether we are running in monitor mode. 58 * return true, if the current mode is Monitor mode, false otherwise. 59 * @note this is safe to call even on machines that do not implement monitor 60 * mode. 61 */ 51 62 static inline bool sec_ext_is_monitor_mode() 52 63 { … … 54 65 } 55 66 67 /** Test whether we are running in a secure state. 68 * return true if the current state is secure, false otherwise. 69 * 70 * @note: This functions will cause undef isntruction trap if we 71 * are not running in the secure state. 72 * 73 * @note: u-boot enables non-secure access to cp 10/11, as well as some other 74 * features and switches to non-secure state during boot. 75 * Look for 'secureworld_exit' in arch/arm/cpu/armv7/omap3/board.c. 76 */ 56 77 static inline bool sec_ext_is_secure() 57 78 { … … 60 81 } 61 82 62 typedef enum {63 SECURITY_CALL_ENABLE_CP10_11 = 0xaaaa64 } sec_ext_call_t;65 66 static inline void sec_ext_call(sec_ext_call_t call)67 {68 asm volatile ("mov r0, %0\nsmc #0" ::"r"(call));69 }70 71 int sec_ext_handle_call(sec_ext_call_t call);72 73 83 #endif 74 75 84 /** @} 76 85 */ 77
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