Changeset a796127 in mainline for kernel/arch/sparc64/src/start.S

Timestamp:

2006-08-26T18:42:11Z (18 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

c8ea4a8b

Parents:

f47fd19

Message:

sparc64 work.
Bunch of changes in preparation for sparc64 mm and userspace support.
Fix alignment of hardcoded_* variables in linker script.

File:

• kernel/arch/sparc64/src/start.S (modified) (5 diffs)

kernel/arch/sparc64/src/start.S

@@ -36 +36 @@
 .register %g2, #scratch
 .register %g3, #scratch
-.register %g6, #scratch
-.register %g7, #scratch
 
 .section K_TEXT_START, "ax"
@@ -154 +152 @@
          */
         
-        set kernel_image_start, %g7
+        set kernel_image_start, %g5
         
         ! write ITLB tag of context 1
@@ -160 +158 @@
         set VA_DMMU_TAG_ACCESS, %g2
         stxa %g1, [%g2] ASI_IMMU
-        flush %g7
+        flush %g5
 
         ! write ITLB data and install the temporary mapping in context 1
         SET_TLB_DATA(g1, g2, 0)                 ! use non-global mapping
         stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG            
-        flush %g7
+        flush %g5
         
         ! switch to context 1
         set MEM_CONTEXT_TEMP, %g1
         stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi ! ASI_DMMU is correct here !!!
-        flush %g7
+        flush %g5
         
         ! demap context 0
         SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_NUCLEUS)
         stxa %g0, [%g1] ASI_IMMU_DEMAP                  
-        flush %g7
+        flush %g5
         
         ! write ITLB tag of context 0
@@ -181 +179 @@
         set VA_DMMU_TAG_ACCESS, %g2
         stxa %g1, [%g2] ASI_IMMU
-        flush %g7
+        flush %g5
 
         ! write ITLB data and install the permanent kernel mapping in context 0
         SET_TLB_DATA(g1, g2, 0)                 ! use non-global mapping
         stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG            
-        flush %g7
+        flush %g5
 
         ! switch to context 0
         stxa %g0, [VA_PRIMARY_CONTEXT_REG] %asi ! ASI_DMMU is correct here !!!
-        flush %g7
+        flush %g5
 
         ! ensure nucleus mapping
@@ -198 +196 @@
         set MEM_CONTEXT_TEMP, %g1
         stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi ! ASI_DMMU is correct here !!!
-        flush %g7
+        flush %g5
 
         ! demap context 1
         SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_PRIMARY)
         stxa %g0, [%g1] ASI_IMMU_DEMAP                  
-        flush %g7
+        flush %g5
         
         ! set context 0 in the primary context register
         stxa %g0, [VA_PRIMARY_CONTEXT_REG] %asi ! ASI_DMMU is correct here !!!
-        flush %g7
+        flush %g5
         
         ! set TL back to 0