Changes in kernel/arch/arm32/src/exception.c [7e752b2:a99a3d7] in mainline
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kernel/arch/arm32/src/exception.c
r7e752b2 ra99a3d7 35 35 36 36 #include <arch/exception.h> 37 #include <arch/memstr.h>38 37 #include <arch/regutils.h> 39 38 #include <arch/machine_func.h> … … 175 174 void istate_decode(istate_t *istate) 176 175 { 177 printf("r0 =% #0" PRIx32 "\tr1 =%#0" PRIx32 "\t"178 "r2 =% #0" PRIx32 "\tr3 =%#0" PRIx32 "\n",176 printf("r0 =%0#10" PRIx32 "\tr1 =%0#10" PRIx32 "\t" 177 "r2 =%0#10" PRIx32 "\tr3 =%0#10" PRIx32 "\n", 179 178 istate->r0, istate->r1, istate->r2, istate->r3); 180 printf("r4 =% #" PRIx32 "\tr5 =%#0" PRIx32 "\t"181 "r6 =% #0" PRIx32 "\tr7 =%#0" PRIx32 "\n",179 printf("r4 =%0#10" PRIx32 "\tr5 =%0#10" PRIx32 "\t" 180 "r6 =%0#10" PRIx32 "\tr7 =%0#10" PRIx32 "\n", 182 181 istate->r4, istate->r5, istate->r6, istate->r7); 183 printf("r8 =%#0" PRIx32 "\tr9 =%#0" PRIx32 "\t" 184 "r10=%#0" PRIx32 "\tfp =%p\n", 185 istate->r8, istate->r9, istate->r10, 186 (void *) istate->fp); 187 printf("r12=%#0" PRIx32 "\tsp =%p\tlr =%p\tspsr=%p\n", 188 istate->r12, (void *) istate->sp, 189 (void *) istate->lr, (void *) istate->spsr); 182 printf("r8 =%0#10" PRIx32 "\tr9 =%0#10" PRIx32 "\t" 183 "r10=%0#10" PRIx32 "\tfp =%0#10" PRIx32 "\n", 184 istate->r8, istate->r9, istate->r10, istate->fp); 185 printf("r12=%0#10" PRIx32 "\tsp =%0#10" PRIx32 "\t" 186 "lr =%0#10" PRIx32 "\tspsr=%0#10" PRIx32 "\n", 187 istate->r12, istate->sp, istate->lr, istate->spsr); 190 188 } 191 189
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