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  • boot/arch/arm32/src/asm.S

    r24bead17 rab63b04e  
    6060        # before passing control to the copied code.
    6161        #
    62 
    63         #
    64         # r0 is kernel entry point
    65         # r1 is pointer to the bootinfo structure
    66 
    67 #define CP15_C1_IC              12
    68 #define CP15_C1_BP              11
    69 #define CP15_C1_DC              2
    70         # Disable I-cache and D-cache before the kernel is started.
    71         mrc     p15, 0, r4, c1, c0, 0
    72         bic     r4, r4, #(1 << CP15_C1_DC)
    73         bic     r4, r4, #(1 << CP15_C1_IC)
    74         bic     r4, r4, #(1 << CP15_C1_BP)
    75         mcr     p15, 0, r4, c1, c0, 0
    76 
    77        
    78         #Wait for the operations to complete
    79 #ifdef PROCESSOR_ARCH_armv7_a
    80         dsb
    81 #else
    82         #cp15 dsb, r4 is ignored (should be zero)
    83         mcr p15, 0, r4, c7, c10, 4
    84 #endif
    85        
    86         # Clean ICache and BPredictors, r4 ignored (SBZ)
    87         mcr p15, 0, r4, c7, c5, 0
    88         nop
    89 
    90         #Wait for the operations to complete
    91 #ifdef PROCESSOR_ARCH_armv7_a
    92         isb
    93         nop
    94 #else
    95         # cp15 isb
    96         mcr p15, 0, r4, c7, c5, 4
    97         nop
    98 #endif
    9962        mov pc, r0
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