Changes in kernel/arch/ia32/src/smp/apic.c [99718a2e:acc7ce4] in mainline
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kernel/arch/ia32/src/smp/apic.c
r99718a2e racc7ce4 72 72 * 73 73 */ 74 volatile uint32_t *l_apic = (uint32_t *) 0xfee00000;75 volatile uint32_t *io_apic = (uint32_t *) 0xfec00000;74 volatile uint32_t *l_apic = (uint32_t *) UINT32_C(0xfee00000); 75 volatile uint32_t *io_apic = (uint32_t *) UINT32_C(0xfec00000); 76 76 77 77 uint32_t apic_id_mask = 0; … … 178 178 disable_irqs_function = io_apic_disable_irqs; 179 179 eoi_function = l_apic_eoi; 180 irqs_info = "apic"; 180 181 181 182 /* … … 184 185 * Other interrupts will be forwarded to the lowest priority CPU. 185 186 */ 186 io_apic_disable_irqs(0xffff );187 io_apic_disable_irqs(0xffffU); 187 188 188 189 irq_initialize(&l_apic_timer_irq); … … 477 478 { 478 479 #ifdef LAPIC_VERBOSE 479 printf("LVT on cpu% " PRIs ", LAPIC ID: %" PRIu8 "\n",480 printf("LVT on cpu%u, LAPIC ID: %" PRIu8 "\n", 480 481 CPU->id, l_apic_id()); 481 482
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