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  • kernel/arch/ia32/src/smp/apic.c

    r99718a2e racc7ce4  
    7272 *
    7373 */
    74 volatile uint32_t *l_apic = (uint32_t *) 0xfee00000;
    75 volatile uint32_t *io_apic = (uint32_t *) 0xfec00000;
     74volatile uint32_t *l_apic = (uint32_t *) UINT32_C(0xfee00000);
     75volatile uint32_t *io_apic = (uint32_t *) UINT32_C(0xfec00000);
    7676
    7777uint32_t apic_id_mask = 0;
     
    178178        disable_irqs_function = io_apic_disable_irqs;
    179179        eoi_function = l_apic_eoi;
     180        irqs_info = "apic";
    180181       
    181182        /*
     
    184185         * Other interrupts will be forwarded to the lowest priority CPU.
    185186         */
    186         io_apic_disable_irqs(0xffff);
     187        io_apic_disable_irqs(0xffffU);
    187188       
    188189        irq_initialize(&l_apic_timer_irq);
     
    477478{
    478479#ifdef LAPIC_VERBOSE
    479         printf("LVT on cpu%" PRIs ", LAPIC ID: %" PRIu8 "\n",
     480        printf("LVT on cpu%u, LAPIC ID: %" PRIu8 "\n",
    480481            CPU->id, l_apic_id());
    481482       
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