Changeset ad2e39b in mainline for kernel/arch/amd64/include/atomic.h


Ignore:
Timestamp:
2008-06-16T21:36:39Z (16 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
9f491d7
Parents:
5336643
Message:

First argument to atomic functions is read-write (amd64).

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/amd64/include/atomic.h

    r5336643 rad2e39b  
    4242static inline void atomic_inc(atomic_t *val) {
    4343#ifdef CONFIG_SMP
    44         asm volatile ("lock incq %0\n" : "=m" (val->count));
     44        asm volatile ("lock incq %0\n" : "+m" (val->count));
    4545#else
    46         asm volatile ("incq %0\n" : "=m" (val->count));
     46        asm volatile ("incq %0\n" : "+m" (val->count));
    4747#endif /* CONFIG_SMP */
    4848}
     
    5050static inline void atomic_dec(atomic_t *val) {
    5151#ifdef CONFIG_SMP
    52         asm volatile ("lock decq %0\n" : "=m" (val->count));
     52        asm volatile ("lock decq %0\n" : "+m" (val->count));
    5353#else
    54         asm volatile ("decq %0\n" : "=m" (val->count));
     54        asm volatile ("decq %0\n" : "+m" (val->count));
    5555#endif /* CONFIG_SMP */
    5656}
     
    6262        asm volatile (
    6363                "lock xaddq %1, %0\n"
    64                 : "=m" (val->count), "+r" (r)
     64                : "+m" (val->count), "+r" (r)
    6565        );
    6666
     
    7474        asm volatile (
    7575                "lock xaddq %1, %0\n"
    76                 : "=m" (val->count), "+r" (r)
     76                : "+m" (val->count), "+r" (r)
    7777        );
    7878       
     
    8080}
    8181
    82 #define atomic_preinc(val) (atomic_postinc(val)+1)
    83 #define atomic_predec(val) (atomic_postdec(val)-1)
     82#define atomic_preinc(val) (atomic_postinc(val) + 1)
     83#define atomic_predec(val) (atomic_postdec(val) - 1)
    8484
    8585static inline uint64_t test_and_set(atomic_t *val) {
     
    8989                "movq $1, %0\n"
    9090                "xchgq %0, %1\n"
    91                 : "=r" (v),"=m" (val->count)
     91                : "=r" (v), "+m" (val->count)
    9292        );
    9393       
     
    103103        preemption_disable();
    104104        asm volatile (
    105                 "0:;"
     105                "0:\n"
    106106#ifdef CONFIG_HT
    107                 "pause;"
     107                "pause\n"
    108108#endif
    109                 "mov %0, %1;"
    110                 "testq %1, %1;"
    111                 "jnz 0b;"       /* Lightweight looping on locked spinlock */
     109                "mov %0, %1\n"
     110                "testq %1, %1\n"
     111                "jnz 0b\n"       /* Lightweight looping on locked spinlock */
    112112               
    113                 "incq %1;"      /* now use the atomic operation */
    114                 "xchgq %0, %1;"
    115                 "testq %1, %1;"
    116                 "jnz 0b;"
    117                 : "=m"(val->count),"=r"(tmp)
    118                 );
     113                "incq %1\n"      /* now use the atomic operation */
     114                "xchgq %0, %1\n"
     115                "testq %1, %1\n"
     116                "jnz 0b\n"
     117                : "+m" (val->count), "=r"(tmp)
     118        );
    119119        /*
    120120         * Prevent critical section code from bleeding out this way up.
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