Changeset ad7a6c9 in mainline for kernel/arch/ia64/src/mm/tlb.c
- Timestamp:
- 2011-03-30T13:10:24Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 4ae90f9
- Parents:
- 6e50466 (diff), d6b81941 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
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- 1 edited
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kernel/arch/ia64/src/mm/tlb.c
r6e50466 rad7a6c9 475 475 void alternate_instruction_tlb_fault(uint64_t vector, istate_t *istate) 476 476 { 477 region_register_t rr;478 rid_t rid;479 477 uintptr_t va; 480 478 pte_t *t; 481 479 482 480 va = istate->cr_ifa; /* faulting address */ 483 rr.word = rr_read(VA2VRN(va));484 rid = rr.map.rid;485 481 486 482 page_table_lock(AS, true); … … 649 645 void data_dirty_bit_fault(uint64_t vector, istate_t *istate) 650 646 { 651 region_register_t rr;652 rid_t rid;653 647 uintptr_t va; 654 648 pte_t *t; 655 649 656 650 va = istate->cr_ifa; /* faulting address */ 657 rr.word = rr_read(VA2VRN(va));658 rid = rr.map.rid;659 651 660 652 page_table_lock(AS, true); … … 686 678 void instruction_access_bit_fault(uint64_t vector, istate_t *istate) 687 679 { 688 region_register_t rr;689 rid_t rid;690 680 uintptr_t va; 691 681 pte_t *t; 692 682 693 683 va = istate->cr_ifa; /* faulting address */ 694 rr.word = rr_read(VA2VRN(va));695 rid = rr.map.rid;696 684 697 685 page_table_lock(AS, true); … … 723 711 void data_access_bit_fault(uint64_t vector, istate_t *istate) 724 712 { 725 region_register_t rr;726 rid_t rid;727 713 uintptr_t va; 728 714 pte_t *t; 729 715 730 716 va = istate->cr_ifa; /* faulting address */ 731 rr.word = rr_read(VA2VRN(va));732 rid = rr.map.rid;733 717 734 718 page_table_lock(AS, true); … … 760 744 void data_access_rights_fault(uint64_t vector, istate_t *istate) 761 745 { 762 region_register_t rr;763 rid_t rid;764 746 uintptr_t va; 765 747 pte_t *t; 766 748 767 749 va = istate->cr_ifa; /* faulting address */ 768 rr.word = rr_read(VA2VRN(va));769 rid = rr.map.rid;770 750 771 751 /* … … 792 772 void page_not_present(uint64_t vector, istate_t *istate) 793 773 { 794 region_register_t rr;795 rid_t rid;796 774 uintptr_t va; 797 775 pte_t *t; 798 776 799 777 va = istate->cr_ifa; /* faulting address */ 800 rr.word = rr_read(VA2VRN(va));801 rid = rr.map.rid;802 778 803 779 page_table_lock(AS, true);
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