Changes in uspace/lib/c/arch/arm32/src/atomic.c [51949d0:ae787807] in mainline

File:

• uspace/lib/c/arch/arm32/src/atomic.c (modified) (2 diffs)

uspace/lib/c/arch/arm32/src/atomic.c

@@ -106 +106 @@
 }
 
-bool __atomic_compare_exchange_1(volatile void *mem0, void *expected0,
-    unsigned char desired, bool weak, int success, int failure)
-{
-        volatile unsigned char *mem = mem0;
-        unsigned char *expected = expected0;
+bool __atomic_compare_exchange_4(volatile void *mem0, void *expected0,
+    unsigned desired, bool weak, int success, int failure)
+{
+        volatile unsigned *mem = mem0;
+        unsigned *expected = expected0;
 
         (void) success;
@@ -116 +116 @@
         (void) weak;
 
-        unsigned char ov = *expected;
-        unsigned ret;
-
-        /*
-         * The following instructions between labels 1 and 2 constitute a
-         * Restartable Atomic Sequence. Should the sequence be non-atomic,
-         * the kernel will restart it.
-         */
-        asm volatile (
-            "1:\n"
-            "   adr %[ret], 1b\n"
-            "   str %[ret], %[rp0]\n"
-            "   adr %[ret], 2f\n"
-            "   str %[ret], %[rp1]\n"
-
-            "   ldrb %[ret], %[addr]\n"
-            "   cmp %[ret], %[ov]\n"
-            "   streqb %[nv], %[addr]\n"
-            "2:\n"
-            : [ret] "=&r" (ret),
-              [rp0] "=m" (ras_page[0]),
-              [rp1] "=m" (ras_page[1]),
-              [addr] "+m" (*mem)
-            : [ov] "r" (ov),
-              [nv] "r" (desired)
-        );
-
-        ras_page[0] = 0;
-        ras_page[1] = 0xffffffff;
-
-        if (ret == ov)
-                return true;
-
-        *expected = ret;
-        return false;
-}
-
-bool __atomic_compare_exchange_4(volatile void *mem0, void *expected0,
-    unsigned desired, bool weak, int success, int failure)
-{
-        volatile unsigned *mem = mem0;
-        unsigned *expected = expected0;
-
-        (void) success;
-        (void) failure;
-        (void) weak;
-
         unsigned ov = *expected;
         unsigned ret;