Changes in / [721d4e85:af56e9b] in mainline
- Files:
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- 13 added
- 2 deleted
- 8 edited
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HelenOS.config
r721d4e85 raf56e9b 344 344 ! [PLATFORM=sparc64] CONFIG_VIRT_IDX_DCACHE (y/n) 345 345 346 % Simics SMP Hack 347 ! [PROCESSOR=sun4v] CONFIG_SIMICS_SMP_HACK (y/n) 348 346 349 % Support for userspace debuggers 347 350 ! CONFIG_UDEBUG (y/n) -
kernel/arch/sparc64/Makefile.inc
r721d4e85 raf56e9b 92 92 arch/$(KARCH)/src/drivers/sgcn.c \ 93 93 arch/$(KARCH)/src/drivers/pci.c \ 94 arch/$(KARCH)/src/drivers/fhc.c 94 arch/$(KARCH)/src/drivers/fhc.c \ 95 arch/$(KARCH)/src/trap/$(USARCH)/interrupt.c 95 96 96 97 ifeq ($(USARCH),sun4u) … … 112 113 ifeq ($(CONFIG_SMP),y) 113 114 ARCH_SOURCES += \ 114 arch/$(KARCH)/src/smp/ ipi.c \115 arch/$(KARCH)/src/smp/ smp.c115 arch/$(KARCH)/src/smp/$(USARCH)/smp.c \ 116 arch/$(KARCH)/src/smp/$(USARCH)/ipi.c 116 117 endif 117 118 -
kernel/arch/sparc64/include/sun4v/cpu.h
r721d4e85 raf56e9b 46 46 struct cpu; 47 47 48 /*49 48 typedef struct { 50 49 uint64_t exec_unit_id; … … 52 51 uint64_t cpuids[MAX_CORE_STRANDS]; 53 52 struct cpu *cpus[MAX_CORE_STRANDS]; 53 //cpu_t *cpus[MAX_CORE_STRANDS]; 54 54 atomic_t nrdy; 55 55 SPINLOCK_DECLARE(proposed_nrdy_lock); 56 56 } exec_unit_t; 57 */58 57 59 58 typedef struct cpu_arch { … … 63 62 generated when the TICK register 64 63 matches this value. */ 65 //exec_unit_t *exec_unit; /**< Physical core. */66 //unsigned long proposed_nrdy; /**< Proposed No. of ready threads67 //so that cores are equally balanced. */64 exec_unit_t *exec_unit; /**< Physical core. */ 65 unsigned long proposed_nrdy; /**< Proposed No. of ready threads 66 so that cores are equally balanced. */ 68 67 } cpu_arch_t; 69 68 -
kernel/arch/sparc64/include/trap/interrupt.h
r721d4e85 raf56e9b 32 32 /** 33 33 * @file 34 * @brief This file contains interrupt vector trap handler. 34 * @brief This file contains level N interrupt and inter-processor interrupt 35 * trap handler. 35 36 */ 36 37 #ifndef KERN_sparc64_TRAP_INTERRUPT_H_ 38 #define KERN_sparc64_TRAP_INTERRUPT_H_ 39 40 #include <arch/trap/trap_table.h> 41 #include <arch/stack.h> 42 43 /* IMAP register bits */ 44 #define IGN_MASK 0x7c0 45 #define INO_MASK 0x1f 46 #define IMAP_V_MASK (1ULL << 31) 47 48 #define IGN_SHIFT 6 49 50 51 /* Interrupt ASI registers. */ 52 #define ASI_INTR_W 0x77 53 #define ASI_INTR_DISPATCH_STATUS 0x48 54 #define ASI_INTR_R 0x7f 55 #define ASI_INTR_RECEIVE 0x49 56 57 /* VA's used with ASI_INTR_W register. */ 58 #if defined (US) 59 #define ASI_UDB_INTR_W_DATA_0 0x40 60 #define ASI_UDB_INTR_W_DATA_1 0x50 61 #define ASI_UDB_INTR_W_DATA_2 0x60 62 #elif defined (US3) 63 #define VA_INTR_W_DATA_0 0x40 64 #define VA_INTR_W_DATA_1 0x48 65 #define VA_INTR_W_DATA_2 0x50 66 #define VA_INTR_W_DATA_3 0x58 67 #define VA_INTR_W_DATA_4 0x60 68 #define VA_INTR_W_DATA_5 0x68 69 #define VA_INTR_W_DATA_6 0x80 70 #define VA_INTR_W_DATA_7 0x88 71 #endif 72 #define VA_INTR_W_DISPATCH 0x70 73 74 /* VA's used with ASI_INTR_R register. */ 75 #if defined(US) 76 #define ASI_UDB_INTR_R_DATA_0 0x40 77 #define ASI_UDB_INTR_R_DATA_1 0x50 78 #define ASI_UDB_INTR_R_DATA_2 0x60 79 #elif defined (US3) 80 #define VA_INTR_R_DATA_0 0x40 81 #define VA_INTR_R_DATA_1 0x48 82 #define VA_INTR_R_DATA_2 0x50 83 #define VA_INTR_R_DATA_3 0x58 84 #define VA_INTR_R_DATA_4 0x60 85 #define VA_INTR_R_DATA_5 0x68 86 #define VA_INTR_R_DATA_6 0x80 87 #define VA_INTR_R_DATA_7 0x88 88 #endif 89 90 /* Shifts in the Interrupt Vector Dispatch virtual address. */ 91 #define INTR_VEC_DISPATCH_MID_SHIFT 14 92 93 /* Bits in the Interrupt Dispatch Status register. */ 94 #define INTR_DISPATCH_STATUS_NACK 0x2 95 #define INTR_DISPATCH_STATUS_BUSY 0x1 37 #ifndef KERN_sparc64_INTERRUPT_TRAP_H_ 38 #define KERN_sparc64_INTERRUPT_TRAP_H_ 96 39 97 40 #define TT_INTERRUPT_LEVEL_1 0x41 … … 111 54 #define TT_INTERRUPT_LEVEL_15 0x4f 112 55 113 #define TT_INTERRUPT_VECTOR_TRAP 0x6056 #define INTERRUPT_LEVEL_N_HANDLER_SIZE TRAP_TABLE_ENTRY_SIZE 114 57 115 #define INTERRUPT_LEVEL_N_HANDLER_SIZE TRAP_TABLE_ENTRY_SIZE 116 #define INTERRUPT_VECTOR_TRAP_HANDLER_SIZE TRAP_TABLE_ENTRY_SIZE 58 /* IMAP register bits */ 59 #define IGN_MASK 0x7c0 60 #define INO_MASK 0x1f 61 #define IMAP_V_MASK (1ULL << 31) 62 63 #define IGN_SHIFT 6 64 117 65 118 66 #ifdef __ASM__ … … 121 69 PREEMPTIBLE_HANDLER exc_dispatch 122 70 .endm 123 124 .macro INTERRUPT_VECTOR_TRAP_HANDLER 125 PREEMPTIBLE_HANDLER interrupt 126 .endm 127 #endif /* __ASM__ */ 71 #endif 128 72 129 73 #ifndef __ASM__ … … 134 78 #endif /* !def __ASM__ */ 135 79 80 81 #if defined (SUN4U) 82 #include <arch/trap/sun4u/interrupt.h> 83 #elif defined (SUN4V) 84 #include <arch/trap/sun4v/interrupt.h> 85 #endif 86 136 87 #endif 137 88 -
kernel/arch/sparc64/src/cpu/sun4v/cpu.c
r721d4e85 raf56e9b 41 41 #include <arch/sun4v/md.h> 42 42 #include <arch/sun4v/hypercall.h> 43 #include <arch/trap/sun4v/interrupt.h> 43 44 44 45 //#include <arch/trap/sun4v/interrupt.h> … … 74 75 75 76 tick_init(); 76 //MH - uncomment later 77 //sun4v_ipi_init();77 78 sun4v_ipi_init(); 78 79 } 79 80 -
kernel/arch/sparc64/src/trap/interrupt.c
r721d4e85 raf56e9b 1 1 /* 2 2 * Copyright (c) 2005 Jakub Jermar 3 * Copyright (c) 2009 Pavel Rimsky 3 4 * All rights reserved. 4 5 * … … 34 35 35 36 #include <arch/interrupt.h> 37 #include <arch/trap/interrupt.h> 36 38 #include <arch/sparc64.h> 37 #include <arch/trap/interrupt.h>38 39 #include <interrupt.h> 39 40 #include <ddi/irq.h> … … 60 61 exc_register(n - 1, name, f); 61 62 } 62 63 /** Process hardware interrupt.64 *65 * @param n Ignored.66 * @param istate Ignored.67 */68 void interrupt(int n, istate_t *istate)69 {70 uint64_t status;71 uint64_t intrcv;72 uint64_t data0;73 status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0);74 if (status & (!INTR_DISPATCH_STATUS_BUSY))75 panic("Interrupt Dispatch Status busy bit not set.");76 77 intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0);78 #if defined (US)79 data0 = asi_u64_read(ASI_INTR_R, ASI_UDB_INTR_R_DATA_0);80 #elif defined (US3)81 data0 = asi_u64_read(ASI_INTR_R, VA_INTR_R_DATA_0);82 #endif83 84 irq_t *irq = irq_dispatch_and_lock(data0);85 if (irq) {86 /*87 * The IRQ handler was found.88 */89 irq->handler(irq);90 /*91 * See if there is a clear-interrupt-routine and call it.92 */93 if (irq->cir) {94 irq->cir(irq->cir_arg, irq->inr);95 }96 spinlock_unlock(&irq->lock);97 } else if (data0 > config.base) {98 /*99 * This is a cross-call.100 * data0 contains address of the kernel function.101 * We call the function only after we verify102 * it is one of the supported ones.103 */104 #ifdef CONFIG_SMP105 if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) {106 tlb_shootdown_ipi_recv();107 }108 #endif109 } else {110 /*111 * Spurious interrupt.112 */113 #ifdef CONFIG_DEBUG114 printf("cpu%u: spurious interrupt (intrcv=%#" PRIx64115 ", data0=%#" PRIx64 ")\n", CPU->id, intrcv, data0);116 #endif117 }118 119 membar();120 asi_u64_write(ASI_INTR_RECEIVE, 0, 0);121 }122 123 63 /** @} 124 64 */ -
kernel/generic/include/cpu.h
r721d4e85 raf56e9b 48 48 * There is one structure like this for every processor. 49 49 */ 50 typedef struct {50 typedef struct cpu { 51 51 SPINLOCK_DECLARE(lock); 52 52 -
kernel/generic/src/proc/scheduler.c
r721d4e85 raf56e9b 201 201 * even though there is a runnable thread. 202 202 */ 203 204 203 cpu_sleep(); 205 204 goto loop;
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