Changeset b00fdde in mainline


Ignore:
Timestamp:
2005-12-08T22:43:39Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
0d04024
Parents:
944b15c
Message:

sparc64 work.
Implement functions for reading IMMU and DMMU TLBs.

Files:
12 edited

Legend:

Unmodified
Added
Removed

  • arch/amd64/include/mm/tlb.h

    r944b15c rb00fdde  
    3030#define __amd64_TLB_H__
    3131
    32 #define tlb_init_arch()
     32#define tlb_arch_init()
     33#define tlb_print()
    3334
    3435#endif

  • arch/ia32/include/mm/tlb.h

    r944b15c rb00fdde  
    3030#define __ia32_TLB_H__
    3131
    32 #define tlb_init_arch()
     32#define tlb_arch_init()
     33#define tlb_print()
    3334
    3435#endif

  • arch/ia64/include/mm/tlb.h

    r944b15c rb00fdde  
    3030#define __ia64_TLB_H__
    3131
    32 #define tlb_init_arch()
     32#define tlb_arch_init()
     33#define tlb_print()
    3334
    3435#endif

  • arch/mips32/src/mm/tlb.c

    r944b15c rb00fdde  
    5454 * Invalidate all entries and mark wired entries.
    5555 */
    56 void tlb_init_arch(void)
     56void tlb_arch_init(void)
    5757{
    5858        int i;
    … …  
    399399        hi->asid = asid;
    400400}
     401
     402void tlb_print(void)
     403{
     404}

  • arch/ppc32/include/mm/tlb.h

    r944b15c rb00fdde  
    3030#define __ppc32_TLB_H__
    3131
    32 #define tlb_init_arch()
     32#define tlb_arch_init()
     33#define tlb_print()
    3334
    3435#endif

  • arch/sparc64/Makefile.inc

    r944b15c rb00fdde  
    5454        arch/$(ARCH)/src/mm/frame.c \
    5555        arch/$(ARCH)/src/mm/page.c \
     56        arch/$(ARCH)/src/mm/tlb.c \
    5657        arch/$(ARCH)/src/sparc64.c \
    5758        arch/$(ARCH)/src/start.S \

  • arch/sparc64/include/asm.h

    r944b15c rb00fdde  
    108108}
    109109
     110/** Load __u64 from alternate space.
     111 *
     112 * @param asi ASI determining the alternate space.
     113 * @param va Virtual address within the ASI.
     114 *
     115 * @return Value read from the virtual address in the specified address space.
     116 */
     117static inline __u64 asi_u64_read(asi_t asi, __address va)
     118{
     119        __u64 v;
     120       
     121        __asm__ volatile ("ldxa [%1] %2, %0\n" : "=r" (v) : "r" (va), "i" (asi));
     122       
     123        return v;
     124}
     125
     126/** Store __u64 to alternate space.
     127 *
     128 * @param asi ASI determining the alternate space.
     129 * @param va Virtual address within the ASI.
     130 * @param v Value to be written.
     131 */
     132static inline void asi_u64_write(asi_t asi, __address va, __u64 v)
     133{
     134        __asm__ volatile ("stxa %0, [%1] %2\n" : :  "r" (v), "r" (va), "i" (asi));
     135}
     136
    110137
    111138void cpu_halt(void);

  • arch/sparc64/include/barrier.h

    r944b15c rb00fdde  
    4040#define write_barrier()
    4141
     42#define flush()                 __asm__ volatile ("flush\n" ::: "memory")
     43
    4244#endif

  • arch/sparc64/include/mm/tlb.h

    r944b15c rb00fdde  
    3131
    3232#include <arch/mm/tte.h>
     33#include <arch/asm.h>
     34#include <arch/types.h>
     35#include <typedefs.h>
     36
     37#define ITLB_ENTRY_COUNT                64
     38#define DTLB_ENTRY_COUNT                64
    3339
    3440/** I-MMU ASIs. */
    … …  
    7177typedef tte_data_t tlb_data_t;
    7278
    73 #define tlb_init_arch()
     79/** I-/D-TLB Data Access Address in Alternate Space. */
     80union tlb_data_access_addr {
     81        __u64 value;
     82        struct {
     83                __u64 : 55;
     84                unsigned tlb_entry : 6;
     85                unsigned : 3;
     86        } __attribute__ ((packed));
     87};
     88typedef union tlb_data_access_addr tlb_data_access_addr_t;
     89typedef union tlb_data_access_addr tlb_tag_read_addr_t;
     90
     91/** I-/D-TLB Tag Read Register. */
     92union tlb_tag_read_reg {
     93        __u64 value;
     94        struct {
     95                __u64 va : 51;          /**< Virtual Address. */
     96                unsigned context : 13;  /**< Context identifier. */
     97        } __attribute__ ((packed));
     98};
     99typedef union tlb_tag_read_reg tlb_tag_read_reg_t;
     100
     101/** Read IMMU TLB Data Access Register.
     102 *
     103 * @param entry TLB Entry index.
     104 *
     105 * @return Current value of specified IMMU TLB Data Access Register.
     106 */
     107static inline __u64 itlb_data_access_read(index_t entry)
     108{
     109        tlb_data_access_addr_t reg;
     110       
     111        reg.value = 0;
     112        reg.tlb_entry = entry;
     113        return asi_u64_read(ASI_ITLB_DATA_ACCESS_REG, reg.value);
     114}
     115
     116/** Read DMMU TLB Data Access Register.
     117 *
     118 * @param entry TLB Entry index.
     119 *
     120 * @return Current value of specified DMMU TLB Data Access Register.
     121 */
     122static inline __u64 dtlb_data_access_read(index_t entry)
     123{
     124        tlb_data_access_addr_t reg;
     125       
     126        reg.value = 0;
     127        reg.tlb_entry = entry;
     128        return asi_u64_read(ASI_DTLB_DATA_ACCESS_REG, reg.value);
     129}
     130
     131/** Read IMMU TLB Tag Read Register.
     132 *
     133 * @param entry TLB Entry index.
     134 *
     135 * @return Current value of specified IMMU TLB Tag Read Register.
     136 */
     137static inline __u64 itlb_tag_read(index_t entry)
     138{
     139        tlb_tag_read_addr_t tag;
     140
     141        tag.value = 0;
     142        tag.tlb_entry = entry;
     143        return asi_u64_read(ASI_ITLB_TAG_READ_REG, tag.value);
     144}
     145
     146/** Read DMMU TLB Tag Read Register.
     147 *
     148 * @param entry TLB Entry index.
     149 *
     150 * @return Current value of specified DMMU TLB Tag Read Register.
     151 */
     152static inline __u64 dtlb_tag_read(index_t entry)
     153{
     154        tlb_tag_read_addr_t tag;
     155
     156        tag.value = 0;
     157        tag.tlb_entry = entry;
     158        return asi_u64_read(ASI_DTLB_TAG_READ_REG, tag.value);
     159}
    74160
    75161#endif

  • arch/sparc64/include/types.h

    r944b15c rb00fdde  
    4747typedef __u64 pte_t;
    4848
     49typedef __u8 asi_t;
     50
    4951#endif

  • generic/include/mm/tlb.h

    r944b15c rb00fdde  
    4545
    4646/* Export TLB interface that each architecture must implement. */
    47 extern void tlb_init_arch(void);
     47extern void tlb_arch_init(void);
     48extern void tlb_print(void);
    4849extern void tlb_invalidate(asid_t asid);
    4950extern void tlb_shootdown_ipi_send(void);

  • generic/src/mm/tlb.c

    r944b15c rb00fdde  
    4646                spinlock_initialize(&tlblock, "tlb_lock");
    4747
    48         tlb_init_arch();
     48        tlb_arch_init();
    4949}
    5050
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