Changeset b1bdc7a4 in mainline for uspace/srv/hid/kbd/Makefile
- Timestamp:
- 2011-06-11T19:48:15Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 56ad818
- Parents:
- 774fc85
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/srv/hid/kbd/Makefile
r774fc85 rb1bdc7a4 49 49 layout/cz.c \ 50 50 layout/us_qwerty.c \ 51 layout/us_dvorak.c 51 layout/us_dvorak.c \ 52 port/adb.c \ 53 port/chardev.c \ 54 port/dummy.c \ 55 port/gxemul.c \ 56 port/msim.c \ 57 port/niagara.c \ 58 port/ns16550.c \ 59 port/pl050.c \ 60 port/sgcn.c \ 61 port/ski.c \ 62 port/sun.c \ 63 port/z8530.c 64 52 65 53 66 ifeq ($(UARCH),amd64) 54 67 SOURCES += \ 55 port/chardev.c \56 68 ctl/pc.c 57 69 endif … … 60 72 ifeq ($(MACHINE),gta02) 61 73 SOURCES += \ 62 port/chardev.c \63 74 ctl/stty.c 64 75 endif 65 76 ifeq ($(MACHINE),testarm) 66 SOURCES += \67 port/gxemul.c68 69 77 ifeq ($(CONFIG_FB),y) 70 78 SOURCES += \ … … 77 85 ifeq ($(MACHINE),integratorcp) 78 86 SOURCES += \ 79 port/pl050.c \80 87 ctl/pc.c 81 88 endif … … 84 91 ifeq ($(UARCH),ia32) 85 92 SOURCES += \ 86 port/chardev.c \87 93 ctl/pc.c 88 94 endif … … 90 96 ifeq ($(MACHINE),i460GX) 91 97 SOURCES += \ 92 port/chardev.c \93 98 ctl/pc.c 94 99 endif … … 96 101 ifeq ($(MACHINE),ski) 97 102 SOURCES += \ 98 port/ski.c \99 103 ctl/stty.c 100 104 endif … … 102 106 ifeq ($(MACHINE),msim) 103 107 SOURCES += \ 104 port/msim.c \105 108 ctl/stty.c 106 109 endif 107 110 108 111 ifeq ($(MACHINE),lgxemul) 109 SOURCES += \110 port/gxemul.c111 112 112 ifeq ($(CONFIG_FB),y) 113 113 SOURCES += \ … … 120 120 121 121 ifeq ($(MACHINE),bgxemul) 122 SOURCES += \123 port/gxemul.c124 125 122 ifeq ($(CONFIG_FB),y) 126 123 SOURCES += \ … … 134 131 ifeq ($(UARCH),ppc32) 135 132 SOURCES += \ 136 port/adb.c \137 133 ctl/apple.c 138 134 endif … … 141 137 ifeq ($(PROCESSOR),sun4v) 142 138 SOURCES += \ 143 port/niagara.c \144 139 ctl/stty.c 145 140 else 146 141 ifeq ($(MACHINE),serengeti) 147 142 SOURCES += \ 148 port/sgcn.c \149 143 ctl/stty.c 150 144 endif 151 145 ifeq ($(MACHINE),generic) 152 146 SOURCES += \ 153 port/sun.c \ 154 port/z8530.c \ 155 port/ns16550.c \ 156 ctl/sun.c 147 ctl/sun.c 157 148 endif 158 149 endif … … 161 152 ifeq ($(UARCH),abs32le) 162 153 SOURCES += \ 163 port/dummy.c \164 154 ctl/pc.c 165 155 endif
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