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  • kernel/arch/ia32/src/smp/apic.c

    r0f17bff rb2fa1204  
    7272 *
    7373 */
    74 volatile uint32_t *l_apic = (uint32_t *) L_APIC_BASE;
    75 volatile uint32_t *io_apic = (uint32_t *) IO_APIC_BASE;
     74volatile uint32_t *l_apic = (uint32_t *) UINT32_C(0xfee00000);
     75volatile uint32_t *io_apic = (uint32_t *) UINT32_C(0xfec00000);
    7676
    7777uint32_t apic_id_mask = 0;
     
    264264}
    265265
    266 /* Waits for the destination cpu to accept the previous ipi. */
     266#define DELIVS_PENDING_SILENT_RETRIES   4       
     267
    267268static void l_apic_wait_for_delivery(void)
    268269{
    269270        icr_t icr;
    270        
     271        unsigned retries = 0;
     272
    271273        do {
     274                if (retries++ > DELIVS_PENDING_SILENT_RETRIES) {
     275                        retries = 0;
     276#ifdef CONFIG_DEBUG
     277                        log(LF_ARCH, LVL_DEBUG, "IPI is pending.");
     278#endif
     279                        delay(20);
     280                }
    272281                icr.lo = l_apic[ICRlo];
    273         } while (icr.delivs != DELIVS_IDLE);
    274 }
    275 
    276 /** Send one CPU an IPI vector.
    277  *
    278  * @param apicid Physical APIC ID of the destination CPU.
     282        } while (icr.delivs == DELIVS_PENDING);
     283       
     284}
     285
     286/** Send all CPUs excluding CPU IPI vector.
     287 *
    279288 * @param vector Interrupt vector to be sent.
    280289 *
    281290 * @return 0 on failure, 1 on success.
    282  */
    283 int l_apic_send_custom_ipi(uint8_t apicid, uint8_t vector)
     291 *
     292 */
     293int l_apic_broadcast_custom_ipi(uint8_t vector)
    284294{
    285295        icr_t icr;
    286 
    287         /* Wait for a destination cpu to accept our previous ipi. */
    288         l_apic_wait_for_delivery();
    289        
    290         icr.lo = l_apic[ICRlo];
    291         icr.hi = l_apic[ICRhi];
    292        
    293         icr.delmod = DELMOD_FIXED;
    294         icr.destmod = DESTMOD_PHYS;
    295         icr.level = LEVEL_ASSERT;
    296         icr.shorthand = SHORTHAND_NONE;
    297         icr.trigger_mode = TRIGMOD_LEVEL;
    298         icr.vector = vector;
    299         icr.dest = apicid;
    300 
    301         /* Send the IPI by writing to l_apic[ICRlo]. */
    302         l_apic[ICRhi] = icr.hi;
    303         l_apic[ICRlo] = icr.lo;
    304        
    305         return apic_poll_errors();
    306 }
    307 
    308 /** Send all CPUs excluding CPU IPI vector.
    309  *
    310  * @param vector Interrupt vector to be sent.
    311  *
    312  * @return 0 on failure, 1 on success.
    313  *
    314  */
    315 int l_apic_broadcast_custom_ipi(uint8_t vector)
    316 {
    317         icr_t icr;
    318 
    319         /* Wait for a destination cpu to accept our previous ipi. */
    320         l_apic_wait_for_delivery();
    321296       
    322297        icr.lo = l_apic[ICRlo];
     
    329304       
    330305        l_apic[ICRlo] = icr.lo;
     306
     307        l_apic_wait_for_delivery();
    331308       
    332309        return apic_poll_errors();
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