Changes in kernel/arch/ia32/src/smp/mps.c [9d58539:b2fa1204] in mainline
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kernel/arch/ia32/src/smp/mps.c
r9d58539 rb2fa1204 36 36 37 37 #include <config.h> 38 #include < print.h>38 #include <log.h> 39 39 #include <debug.h> 40 40 #include <arch/smp/mps.h> … … 181 181 buf[6] = 0; 182 182 183 printf("MPS: bus=%" PRIu8 " (%s)\n", bus->bus_id, buf);183 log(LF_ARCH, LVL_DEBUG, "MPS: bus=%" PRIu8 " (%s)", bus->bus_id, buf); 184 184 #endif 185 185 } … … 205 205 { 206 206 #ifdef MPSCT_VERBOSE 207 printf("MPS: "); 207 log_begin(LF_ARCH, LVL_DEBUG); 208 log_printf("MPS: "); 208 209 209 210 switch (iointr->intr_type) { 210 211 case 0: 211 printf("INT");212 break; 213 case 1: 214 printf("NMI");215 break; 216 case 2: 217 printf("SMI");218 break; 219 case 3: 220 printf("ExtINT");221 break; 222 } 223 224 printf(", ");212 log_printf("INT"); 213 break; 214 case 1: 215 log_printf("NMI"); 216 break; 217 case 2: 218 log_printf("SMI"); 219 break; 220 case 3: 221 log_printf("ExtINT"); 222 break; 223 } 224 225 log_printf(", "); 225 226 226 227 switch (iointr->poel & 3) { 227 228 case 0: 228 printf("bus-like");229 break; 230 case 1: 231 printf("active high");232 break; 233 case 2: 234 printf("reserved");235 break; 236 case 3: 237 printf("active low");238 break; 239 } 240 241 printf(", ");229 log_printf("bus-like"); 230 break; 231 case 1: 232 log_printf("active high"); 233 break; 234 case 2: 235 log_printf("reserved"); 236 break; 237 case 3: 238 log_printf("active low"); 239 break; 240 } 241 242 log_printf(", "); 242 243 243 244 switch ((iointr->poel >> 2) & 3) { 244 245 case 0: 245 printf("bus-like");246 break; 247 case 1: 248 printf("edge-triggered");249 break; 250 case 2: 251 printf("reserved");252 break; 253 case 3: 254 printf("level-triggered");255 break; 256 } 257 258 printf(", bus=%" PRIu8 " irq=%" PRIu8 " io_apic=%" PRIu8" pin=%"259 PRIu8 "\n", iointr->src_bus_id, iointr->src_bus_irq,246 log_printf("bus-like"); 247 break; 248 case 1: 249 log_printf("edge-triggered"); 250 break; 251 case 2: 252 log_printf("reserved"); 253 break; 254 case 3: 255 log_printf("level-triggered"); 256 break; 257 } 258 259 log_printf(", bus=%" PRIu8 " irq=%" PRIu8 " io_apic=%" PRIu8" pin=%" 260 PRIu8, iointr->src_bus_id, iointr->src_bus_irq, 260 261 iointr->dst_io_apic_id, iointr->dst_io_apic_pin); 262 log_end(); 261 263 #endif 262 264 } … … 266 268 { 267 269 #ifdef MPSCT_VERBOSE 268 printf("MPS: "); 270 log_begin(LF_ARCH, LVL_DEBUG); 271 log_printf("MPS: "); 269 272 270 273 switch (lintr->intr_type) { 271 274 case 0: 272 printf("INT");273 break; 274 case 1: 275 printf("NMI");276 break; 277 case 2: 278 printf("SMI");279 break; 280 case 3: 281 printf("ExtINT");282 break; 283 } 284 285 printf(", ");275 log_printf("INT"); 276 break; 277 case 1: 278 log_printf("NMI"); 279 break; 280 case 2: 281 log_printf("SMI"); 282 break; 283 case 3: 284 log_printf("ExtINT"); 285 break; 286 } 287 288 log_printf(", "); 286 289 287 290 switch (lintr->poel & 3) { 288 291 case 0: 289 printf("bus-like");290 break; 291 case 1: 292 printf("active high");293 break; 294 case 2: 295 printf("reserved");296 break; 297 case 3: 298 printf("active low");299 break; 300 } 301 302 printf(", ");292 log_printf("bus-like"); 293 break; 294 case 1: 295 log_printf("active high"); 296 break; 297 case 2: 298 log_printf("reserved"); 299 break; 300 case 3: 301 log_printf("active low"); 302 break; 303 } 304 305 log_printf(", "); 303 306 304 307 switch ((lintr->poel >> 2) & 3) { 305 308 case 0: 306 printf("bus-like");307 break; 308 case 1: 309 printf("edge-triggered");310 break; 311 case 2: 312 printf("reserved");313 break; 314 case 3: 315 printf("level-triggered");316 break; 317 } 318 319 printf(", bus=%" PRIu8 " irq=%" PRIu8 " l_apic=%" PRIu8" pin=%"320 PRIu8 "\n", lintr->src_bus_id, lintr->src_bus_irq,309 log_printf("bus-like"); 310 break; 311 case 1: 312 log_printf("edge-triggered"); 313 break; 314 case 2: 315 log_printf("reserved"); 316 break; 317 case 3: 318 log_printf("level-triggered"); 319 break; 320 } 321 322 log_printf(", bus=%" PRIu8 " irq=%" PRIu8 " l_apic=%" PRIu8" pin=%" 323 PRIu8, lintr->src_bus_id, lintr->src_bus_irq, 321 324 lintr->dst_l_apic_id, lintr->dst_l_apic_pin); 325 log_end(); 322 326 #endif 323 327 } … … 332 336 switch (cur[CT_EXT_ENTRY_TYPE]) { 333 337 default: 334 printf("MPS: Skipping MP Configuration Table extended " 335 "entry type %" PRIu8 "\n", cur[CT_EXT_ENTRY_TYPE]); 338 log(LF_ARCH, LVL_NOTE, "MPS: Skipping MP Configuration" 339 " Table extended entry type %" PRIu8, 340 cur[CT_EXT_ENTRY_TYPE]); 336 341 } 337 342 } … … 341 346 { 342 347 if (ct->signature != CT_SIGNATURE) { 343 printf("MPS: Wrong ct->signature\n");348 log(LF_ARCH, LVL_WARN, "MPS: Wrong ct->signature"); 344 349 return; 345 350 } 346 351 347 352 if (!mps_ct_check()) { 348 printf("MPS: Wrong ct checksum\n");353 log(LF_ARCH, LVL_WARN, "MPS: Wrong ct checksum"); 349 354 return; 350 355 } 351 356 352 357 if (ct->oem_table) { 353 printf("MPS: ct->oem_table not supported\n");358 log(LF_ARCH, LVL_WARN, "MPS: ct->oem_table not supported"); 354 359 return; 355 360 } … … 402 407 * Something is wrong. Fallback to UP mode. 403 408 */ 404 printf("MPS: ct badness %" PRIu8 "\n", *cur);409 log(LF_ARCH, LVL_WARN, "MPS: ct badness %" PRIu8, *cur); 405 410 return; 406 411 } … … 418 423 * Not yet implemented. 419 424 */ 420 printf("MPS: Default configuration not supported\n");425 log(LF_ARCH, LVL_WARN, "MPS: Default configuration not supported"); 421 426 } 422 427 … … 449 454 450 455 fs_found: 451 printf("%p: MPS Floating Pointer Structure\n", fs);456 log(LF_ARCH, LVL_NOTE, "%p: MPS Floating Pointer Structure", fs); 452 457 453 458 if ((fs->config_type == 0) && (fs->configuration_table)) { 454 459 if (fs->mpfib2 >> 7) { 455 printf("MPS: PIC mode not supported\n");460 log(LF_ARCH, LVL_WARN, "MPS: PIC mode not supported\n"); 456 461 return; 457 462 }
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