Changeset b3e8c90 in mainline


Ignore:
Timestamp:
2006-08-01T11:24:27Z (18 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
e386cbf
Parents:
c049309
Message:

sparc64 work.

  1. Formatting fixes.
  2. When writing to DMMU ASI's, simple membar() can be used in place of flush().
  3. Substantial changes in the way the TLB is taken over.
  4. Remove unneeded functions.

This is the first revision that also runs on a real world Ultra 5 with UltraSPARC IIi
processor.

Note that 3. needs further work as the current implementation depends on the fact
that the compiler will use registers for local variables in take_over_tlb_and_tt().
Rewrite of that function into assembly is to follow.

Files:
10 edited

Legend:

Unmodified
Added
Removed

  • boot/arch/sparc64/loader/main.c

    rc049309 rb3e8c90  
    6161        bootinfo.screen.addr = ofw_translate(bootinfo.screen.addr);
    6262       
    63         if (!ofw_keyboard(&bootinfo.keyboard)) {
    64                 printf("Error: unable to get keyboard properties, halting.\n");
    65                 halt();
    66         }
     63        if (!ofw_keyboard(&bootinfo.keyboard))
     64                printf("Error: unable to get keyboard properties\n");
    6765       
    6866        printf("\nDevice statistics\n");

  • kernel/arch/sparc64/include/barrier.h

    rc049309 rb3e8c90  
    5555         */
    5656         
    57         /*
    58          * %i7 should provide address that is always mapped in DTLB
    59          * as it is a pointer to kernel code.
    60          */
    61         __asm__ volatile ("flush %i7\n");
     57        __asm__ volatile ("flush %0\n" :: "r" (0x400000));
    6258}
    6359

  • kernel/arch/sparc64/include/mm/mmu.h

    rc049309 rb3e8c90  
    2727 */
    2828
    29  /** @addtogroup sparc64mm     
     29/** @addtogroup sparc64mm       
    3030 * @{
    3131 */
    … …  
    3535#ifndef __sparc64_MMU_H__
    3636#define __sparc64_MMU_H__
    37 
    38 #include <arch/asm.h>
    39 #include <arch/barrier.h>
    40 #include <arch/types.h>
    41 #include <typedefs.h>
    4237
    4338/** LSU Control Register ASI. */
    … …  
    8075#define VA_DMMU_PA_WATCHPOINT_REG       0x40    /**< DMMU PA data watchpoint register. */
    8176
     77#ifndef __ASM__
     78
     79#include <arch/asm.h>
     80#include <arch/barrier.h>
     81#include <arch/types.h>
     82#include <typedefs.h>
    8283
    8384/** LSU Control Register. */
    … …  
    103104typedef union lsu_cr_reg lsu_cr_reg_t;
    104105
    105 
    106 #define immu_enable()   immu_set(true)
    107 #define immu_disable()  immu_set(false)
    108 #define dmmu_enable()   dmmu_set(true)
    109 #define dmmu_disable()  dmmu_set(false)
    110 
    111 /** Disable or Enable IMMU. */
    112 static inline void immu_set(bool enable)
    113 {
    114         lsu_cr_reg_t cr;
    115        
    116         cr.value = asi_u64_read(ASI_LSU_CONTROL_REG, 0);
    117         cr.im = enable;
    118         asi_u64_write(ASI_LSU_CONTROL_REG, 0, cr.value);
    119         membar();
    120 }
    121 
    122 /** Disable or Enable DMMU. */
    123 static inline void dmmu_set(bool enable)
    124 {
    125         lsu_cr_reg_t cr;
    126        
    127         cr.value = asi_u64_read(ASI_LSU_CONTROL_REG, 0);
    128         cr.dm = enable;
    129         asi_u64_write(ASI_LSU_CONTROL_REG, 0, cr.value);
    130         membar();
    131 }
     106#endif /* !__ASM__ */
    132107
    133108#endif
    134109
    135  /** @}
     110/** @}
    136111 */
    137 

  • kernel/arch/sparc64/include/mm/page.h

    rc049309 rb3e8c90  
    2727 */
    2828
    29  /** @addtogroup sparc64mm     
     29/** @addtogroup sparc64mm       
    3030 * @{
    3131 */
    … …  
    6666#endif
    6767
    68  /** @}
     68/** @}
    6969 */
    70 

  • kernel/arch/sparc64/include/mm/tlb.h

    rc049309 rb3e8c90  
    2727 */
    2828
    29  /** @addtogroup sparc64mm     
     29/** @addtogroup sparc64mm       
    3030 * @{
    3131 */
    … …  
    228228        reg.tlb_entry = entry;
    229229        asi_u64_write(ASI_DTLB_DATA_ACCESS_REG, reg.value, value);
    230         flush();
     230        membar();
    231231}
    232232
    … …  
    287287{
    288288        asi_u64_write(ASI_DMMU, VA_DMMU_TAG_ACCESS, v);
    289         flush();
     289        membar();
    290290}
    291291
    … …  
    317317{
    318318        asi_u64_write(ASI_DTLB_DATA_IN_REG, 0, v);
    319         flush();
     319        membar();
    320320}
    321321
    … …  
    355355{
    356356        asi_u64_write(ASI_DMMU, VA_DMMU_SFSR, v);
    357         flush();
     357        membar();
    358358}
    359359
    … …  
    408408       
    409409        asi_u64_write(ASI_DMMU_DEMAP, da.value, 0);
    410         flush();
     410        membar();
    411411}
    412412
    … …  
    419419#endif
    420420
    421  /** @}
    422  */
    423 
     421/** @}
     422 */

  • kernel/arch/sparc64/include/mm/tte.h

    rc049309 rb3e8c90  
    2727 */
    2828
    29  /** @addtogroup sparc64mm     
     29/** @addtogroup sparc64mm       
    3030 * @{
    3131 */
    … …  
    7878#endif
    7979
    80  /** @}
     80/** @}
    8181 */
    82 

  • kernel/arch/sparc64/src/console.c

    rc049309 rb3e8c90  
    5555        stdin = NULL;
    5656
    57         kbd_init();
     57        if (bootinfo.keyboard.addr)
     58                kbd_init();
     59               
    5860        fb_init(bootinfo.screen.addr, bootinfo.screen.width, bootinfo.screen.height,
    5961                bootinfo.screen.bpp, bootinfo.screen.scanline);
    … …  
    6668void kkbdpoll(void *arg)
    6769{
     70        if (!bootinfo.keyboard.addr)
     71                return;
     72               
    6873        while (1) {
    6974                i8042_poll();           

  • kernel/arch/sparc64/src/sparc64.c

    rc049309 rb3e8c90  
    9797 * trap table.
    9898 *
    99  * The goal of this function is to disable MMU
    100  * so that both TLBs can be purged and new
    101  * kernel 4M locked entry can be installed.
    102  * After TLB is initialized, MMU is enabled
    103  * again.
     99 * First, demap context 0 and install the
     100 * global 4M locked kernel mapping.
    104101 *
    105  * Switching MMU off imposes the requirement for
    106  * the kernel to run in identity mapped environment.
     102 * Second, prepare a temporary IMMU mapping in
     103 * context 1, switch to it, demap context 0,
     104 * install the global 4M locked kernel mapping
     105 * in context 0 and switch back to context 0.
    107106 *
    108107 * @param base Base address that will be hardwired in both TLBs.
    … …  
    115114        page_address_t pg;
    116115
     116        /*
     117         * Switch to the kernel trap table.
     118         */
     119        trap_switch_trap_table();
     120
    117121        fr.address = base;
    118122        pg.address = base;
    119123
    120         immu_disable();
    121         dmmu_disable();
    122 
    123         /*
    124          * Demap everything, especially OpenFirmware.
    125          */
    126         itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
    127         dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
    128        
    129124        /*
    130125         * We do identity mapping of 4M-page at 4M.
    131126         */
    132         tag.value = ASID_KERNEL;
     127        tag.value = 0;
     128        tag.context = 0;
    133129        tag.vpn = pg.vpn;
    134 
    135         itlb_tag_access_write(tag.value);
    136         dtlb_tag_access_write(tag.value);
    137130
    138131        data.value = 0;
    … …  
    142135        data.l = true;
    143136        data.cp = 1;
    144         data.cv = 1;
     137        data.cv = 0;
    145138        data.p = true;
    146139        data.w = true;
    147140        data.g = true;
    148141
    149         itlb_data_in_write(data.value);
     142        /*
     143         * Straightforwardly demap DMUU context 0,
     144         * and replace it with the locked kernel mapping.
     145         */
     146        dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
     147        dtlb_tag_access_write(tag.value);
    150148        dtlb_data_in_write(data.value);
    151149
    152150        /*
    153          * Register window traps can occur before MMU is enabled again.
    154          * This ensures that any such traps will be handled from
    155          * kernel identity mapped trap handler.
     151         * Install kernel code mapping in context 1
     152         * and switch to it.
    156153         */
    157         trap_switch_trap_table();
     154        tag.context = 1;
     155        data.g = false;
     156        itlb_tag_access_write(tag.value);
     157        itlb_data_in_write(data.value);
     158        mmu_primary_context_write(1);
    158159       
    159         tlb_invalidate_all();
    160 
    161         dmmu_enable();
    162         immu_enable();
     160        /*
     161         * Demap old context 0.
     162         */
     163        itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
     164       
     165        /*
     166         * Install the locked kernel mapping in context 0
     167         * and switch to it.
     168         */
     169        tag.context = 0;
     170        data.g = true;
     171        itlb_tag_access_write(tag.value);
     172        itlb_data_in_write(data.value);
     173        mmu_primary_context_write(0);
    163174}
    164175

  • kernel/arch/sparc64/src/start.S

    rc049309 rb3e8c90  
    7272        nop
    7373
     74        set kernel_image_start, %o0
    7475        /*
    75          * Take over control of identity mapping.
    76          * Take over control of trap table.
     76         * Take over control of MMU.
    7777         *
    78          * After this call, the kernel is entirely self-sufficient
    79          * and independent on OpenFirmware.
     78         * First, take over DMMU for which we don't need to issue
     79         * any FLUSH instructions. Because of that, we can
     80         * demap the old DTLB pretty straightforwardly.
    8081         */
    81         set kernel_image_start, %o0
    8282        call take_over_tlb_and_tt
    8383        nop

  • kernel/generic/src/syscall/copy.c

    rc049309 rb3e8c90  
    2727 */
    2828   
    29  /** @addtogroup generic
     29/** @addtogroup generic
    3030 * @{
    3131 */
    … …  
    129129}
    130130
    131  /** @}
     131/** @}
    132132 */
    133 
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