Changeset b44939b in mainline


Ignore:
Timestamp:
2006-09-26T13:29:07Z (18 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
26678e5
Parents:
45b26dad
Message:

Block the secondary processors after they setup kernel mapping in ITLB and DTLB and
switch to kernel trap table.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/sparc64/src/start.S

    r45b26dad rb44939b  
    4444 *
    4545 * The registers are expected to be in this state:
    46  * - %o0 non-zero for the bootstrup processor, zero for application/secondary processors
     46 * - %o0 non-zero for the bootstrap processor, zero for application/secondary processors
    4747 * - %o1 bootinfo structure address
    4848 * - %o2 bootinfo structure size
    … …  
    5757.global kernel_image_start
    5858kernel_image_start:
    59         brz %o0, kernel_image_start             ! block secondary processors
    60         nop
     59        mov %o0, %l7
    6160
    6261        /*
    … …  
    7675         * to the kernel bootinfo structure.
    7776         */
     77        brz %l7, 0f                             ! skip if you are not the bootstrap CPU
    7878        sethi %hi(bootinfo), %o0
    7979        call memcpy
    8080        or %o0, %lo(bootinfo), %o0
     810:
    8182
    8283        /*
    … …  
    226227        wrpr %g0, 0, %tl
    227228
     229        brz %l7, 2f                             ! skip if you are not the bootstrap CPU
     230
    228231        call arch_pre_main
    229232        nop
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