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  • uspace/drv/bus/usb/uhci/hc.h

    r58563585 rb5111c46  
    3333 * @brief UHCI host controller driver structure
    3434 */
    35 
    3635#ifndef DRV_UHCI_HC_H
    3736#define DRV_UHCI_HC_H
    3837
     38#include <ddf/driver.h>
     39#include <ddf/interrupt.h>
    3940#include <device/hw_res_parsed.h>
    4041#include <fibril.h>
    41 #include <macros.h>
    42 #include <stdbool.h>
    43 #include <sys/types.h>
    4442#include <usb/host/hcd.h>
    45 #include <usb/host/usb_transfer_batch.h>
    4643
    47 #include "uhci_rh.h"
    4844#include "transfer_list.h"
    49 #include "hw_struct/link_pointer.h"
    5045
    5146/** UHCI I/O registers layout */
     
    8883        /** SOF modification to match external timers */
    8984        ioport8_t sofmod;
    90 
    91         PADD8[3];
    92         ioport16_t ports[];
    9385} uhci_regs_t;
    9486
    9587#define UHCI_FRAME_LIST_COUNT 1024
     88#define UHCI_INT_EMULATOR_TIMEOUT 10000
    9689#define UHCI_DEBUGER_TIMEOUT 5000000
    9790#define UHCI_ALLOWED_HW_FAIL 5
     91#define UHCI_NEEDED_IRQ_COMMANDS 5
    9892
    9993/** Main UHCI driver structure */
    10094typedef struct hc {
    101         uhci_rh_t rh;
     95        /** Generic HCD driver structure */
     96        hcd_t *generic;
     97
    10298        /** Addresses of I/O registers */
    10399        uhci_regs_t *registers;
     
    117113        /** Pointer table to the above lists, helps during scheduling */
    118114        transfer_list_t *transfers[2][4];
     115        /** Fibril periodically checking status register*/
     116        fid_t interrupt_emulator;
    119117        /** Indicator of hw interrupts availability */
    120118        bool hw_interrupts;
     
    124122} hc_t;
    125123
    126 extern int hc_init(hc_t *, const hw_res_list_parsed_t *, bool);
    127 extern void hc_fini(hc_t *);
     124int hc_register_irq_handler(ddf_dev_t *, addr_range_t *, int,
     125    interrupt_handler_t);
     126int hc_get_irq_code(irq_pio_range_t [], size_t, irq_cmd_t [], size_t,
     127    addr_range_t *);
     128void hc_interrupt(hc_t *instance, uint16_t status);
     129int hc_init(hc_t *, ddf_fun_t *, addr_range_t *, bool);
    128130
    129 extern int uhci_hc_gen_irq_code(irq_code_t *, const hw_res_list_parsed_t *);
    130 
    131 extern void uhci_hc_interrupt(hcd_t *, uint32_t);
    132 extern int uhci_hc_status(hcd_t *, uint32_t *);
    133 extern int uhci_hc_schedule(hcd_t *, usb_transfer_batch_t *);
    134 
     131/** Safely dispose host controller internal structures
     132 *
     133 * @param[in] instance Host controller structure to use.
     134 */
     135static inline void hc_fini(hc_t *instance) {} /* TODO: implement*/
    135136#endif
    136137
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