Changeset b60a22c in mainline
- Timestamp:
- 2005-06-16T18:47:50Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 992bbb97
- Parents:
- 87cd61f
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
include/arch.h
r87cd61f rb60a22c 36 36 #include <arch/cpu.h> 37 37 38 /* 39 * NOTE: 40 * CPU, THREAD and TASK are not preemption-safe. 41 * Provisions must be made to prevent preemption prior 42 * to using these macros. Simple cpu_priority_high() 43 * call will suffice. 44 */ 38 45 #define CPU (&cpus[CPU_ID_ARCH]) 39 46 #define THREAD (cpu_private_data[CPU_ID_ARCH].thread) -
src/proc/scheduler.c
r87cd61f rb60a22c 48 48 49 49 50 /** Initialize context switching 51 * 52 * Initialize context switching and lazy FPU 53 * context switching. 50 /** Take actions before new thread runs 51 * 52 * Perform actions that need to be 53 * taken before the newly selected 54 * tread is passed control. 54 55 * 55 56 */
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