Changeset b6d4566 in mainline


Ignore:
Timestamp:
2006-03-27T16:56:51Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
ff75d34
Parents:
50fe620
Message:

CPU stacks must have two frames on ia64.
Make sure both thread stack frames are mapped in before_thread_runs_arch().
Take STACK_FRAMES into account during kernel memory layout initialization in main_bsp().

Files:
10 edited

Legend:

Unmodified
Added
Removed
  • arch/ia64/include/context.h

    r50fe620 rb6d4566  
    3737
    3838/*
    39  * context_save() and context_restore() are both leaf procedures.
     39 * context_save_arch() and context_restore_arch() are both leaf procedures.
    4040 * No need to allocate scratch area.
    4141 *
     
    4848#endif
    4949
    50 /*RSE stack should begin under bottom of stack @ kernel*/
    51 #define context_set(c, _pc, stack, size)                                                                \
    52         (c)->pc = (__address) _pc;                                                                      \
    53         (c)->bsp = ((__address) stack) + ALIGN_UP((size), STACK_ALIGNMENT) ;    \
    54         (c)->ar_pfs &= PFM_MASK;                                                                        \
    55         (c)->sp = ((__address) stack) + ALIGN_UP((size), STACK_ALIGNMENT) - SP_DELTA;
     50/* RSE stack starts at the bottom of memory stack. */
     51#define context_set(c, _pc, stack, size)                                                                \
     52        do {                                                                                            \
     53                (c)->pc = (__address) _pc;                                                              \
     54                (c)->bsp = ((__address) stack) + ALIGN_UP((size), REGISTER_STACK_ALIGNMENT);            \
     55                (c)->ar_pfs &= PFM_MASK;                                                                \
     56                (c)->sp = ((__address) stack) + ALIGN_UP((size), STACK_ALIGNMENT) - SP_DELTA;           \
     57        } while (0);
    5658
    5759/*
     
    123125};
    124126
    125 
    126 
    127127#endif
  • arch/ia64/include/mm/tlb.h

    r50fe620 rb6d4566  
    4242#define DTR_KERNEL      0
    4343#define ITR_KERNEL      0
    44 #define DTR_KSTACK      1
     44#define DTR_KSTACK1     1
     45#define DTR_KSTACK2     2
    4546
    4647/** Portion of TLB insertion format data structure. */
  • arch/ia64/src/ivt.S

    r50fe620 rb6d4566  
    3333#include <align.h>
    3434
    35 
    3635#define FRS_TO_SAVE 30
    3736#define STACK_ITEMS             (19 + FRS_TO_SAVE*2)
    38 //#define STACK_ITEMS           19             
    39         /* 30*2 for FPU registers */
    4037#define STACK_FRAME_SIZE        ALIGN_UP((STACK_ITEMS*STACK_ITEM_SIZE) + STACK_SCRATCH_AREA_SIZE, STACK_ALIGNMENT)
    4138
  • arch/ia64/src/proc/scheduler.c

    r50fe620 rb6d4566  
    4444        base = ALIGN_DOWN(config.base, 1<<KERNEL_PAGE_WIDTH);
    4545
    46         if ((__address) THREAD->kstack < base || (__address) THREAD->kstack > base + (1<<KERNEL_PAGE_WIDTH)) {
     46        if ((__address) THREAD->kstack < base || (__address) THREAD->kstack > base + (1<<(KERNEL_PAGE_WIDTH))) {
    4747                /*
    4848                 * Kernel stack of this thread is not mapped by DTR[TR_KERNEL].
    49                  * Use DTR[TR_KSTACK] to map it.
     49                 * Use DTR[TR_KSTACK1] and DTR[TR_KSTACK2] to map it.
    5050                 */
    51                  dtlb_kernel_mapping_insert((__address) THREAD->kstack, KA2PA(THREAD->kstack), true, DTR_KSTACK);
     51                dtlb_kernel_mapping_insert((__address) THREAD->kstack, KA2PA(THREAD->kstack), true, DTR_KSTACK1);
     52                dtlb_kernel_mapping_insert((__address) THREAD->kstack + PAGE_SIZE, KA2PA(THREAD->kstack) + FRAME_SIZE, true, DTR_KSTACK2);
    5253        }
    5354       
  • contrib/conf/msim.conf

    r50fe620 rb6d4566  
    66
    77add rwm mainmem         0x0                     8M              load    "/dev/zero"
    8 add rom startmem        0x1fc00000      1024k   load    "image.boot"
    9 add rwm init            0x01000000      1M              load    "init"
     8add rom startmem        0x1fc00000              1024k           load    "image.boot"
     9add rwm init            0x01000000              1M              load    "init"
    1010
    1111add dprinter printer 0x10000000
  • generic/include/config.h

    r50fe620 rb6d4566  
    3737
    3838#define CONFIG_MEMORY_SIZE      (8 * 1024 * 1024)
    39 #define CONFIG_STACK_SIZE       STACK_SIZE
     39
    4040#define CONFIG_INIT_TASKS       32
    4141
  • generic/include/mm/frame.h

    r50fe620 rb6d4566  
    4848#endif
    4949
    50 
    5150#define ZONES_MAX       16      /**< Maximum number of zones in system */
    5251
    53 #define ZONE_JOIN       0x1     /**< If possible, merge with neighberhood zones */
     52#define ZONE_JOIN       0x1     /**< If possible, merge with neighbouring zones */
    5453
    5554#define FRAME_KA                0x1     /* skip frames conflicting with user address space */
  • generic/src/cpu/cpu.c

    r50fe620 rb6d4566  
    6363
    6464                for (i=0; i < config.cpu_count; i++) {
    65                         cpus[i].stack = (__u8 *) PA2KA(PFN2ADDR(frame_alloc(ONE_FRAME, FRAME_KA | FRAME_PANIC)));
     65                        cpus[i].stack = (__u8 *) PA2KA(PFN2ADDR(frame_alloc(STACK_FRAMES, FRAME_KA | FRAME_PANIC)));
    6666                       
    6767                        cpus[i].id = i;
  • generic/src/main/main.c

    r50fe620 rb6d4566  
    9393#endif
    9494
     95#define CONFIG_STACK_SIZE       ((1<<STACK_FRAMES)*STACK_SIZE)
     96
    9597/** Bootstrap CPU main kernel routine
    9698 *
     
    129131       
    130132        context_save(&ctx);
    131         context_set(&ctx, FADDR(main_bsp_separated_stack),
    132                     stackaddr, CONFIG_STACK_SIZE);
     133        context_set(&ctx, FADDR(main_bsp_separated_stack), stackaddr, THREAD_STACK_SIZE);
    133134        context_restore(&ctx);
    134135        /* not reached */
  • generic/src/proc/thread.c

    r50fe620 rb6d4566  
    267267       
    268268        /* Not needed, but good for debugging */
    269         memsetb((__address)t->kstack, THREAD_STACK_SIZE, 0);
     269        memsetb((__address)t->kstack, THREAD_STACK_SIZE * 1<<STACK_FRAMES, 0);
    270270       
    271271        ipl = interrupts_disable();
Note: See TracChangeset for help on using the changeset viewer.