Changeset b994a60 in mainline for arch/ia64/src/ivt.S
- Timestamp:
- 2006-03-09T12:44:27Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 901122b
- Parents:
- cd373bb
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia64/src/ivt.S
rcd373bb rb994a60 137 137 st8 [r31] = r26, -8 /* save ar.ifs */ 138 138 139 and r30 = ~3, r24 ;; 140 mov ar.rsc = r30 ;; /* place RSE in enforced lazy mode */ 139 and r24 = ~(RSC_PL_MASK), r24 ;; 140 and r30 = ~(RSC_MODE_MASK), r24 ;; 141 mov ar.rsc = r30 ;; /* update RSE state */ 141 142 142 143 mov r27 = ar.rnat … … 163 164 st8 [r31] = r29, -8 /* save ar.bsp */ 164 165 165 mov ar.rsc = r24 /* restore RSE's setting */166 mov ar.rsc = r24 /* restore RSE's setting + kernel privileges */ 166 167 167 168 /* steps 6 - 15 are done by heavyweight_handler_inner() */ … … 301 302 302 303 /* 10. call handler */ 304 movl r1 = _hardcoded_load_address 305 303 306 mov b1 = loc2 304 307 br.call.sptk.many b0 = b1
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