Changeset ba1b7393 in mainline
- Timestamp:
- 2005-09-08T22:40:35Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- b0edf3b2
- Parents:
- 6c4024f
- Location:
- arch/ia64
- Files:
-
- 3 edited
-
include/context.h (modified) (3 diffs)
-
src/context.S (modified) (10 diffs)
-
src/dummy.s (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
arch/ia64/include/context.h
r6c4024f rba1b7393 63 63 __u64 ar_rnat; 64 64 __u64 ar_lc; 65 __u64 ar_ec;66 __u64 ar_ccv;67 __u64 ar_csd;68 __u64 ar_ssd;69 65 70 66 /* … … 72 68 */ 73 69 __u64 r1; 74 __u64 r2;75 __u64 r3;76 70 __u64 r4; 77 71 __u64 r5; 78 72 __u64 r6; 79 73 __u64 r7; 80 __u64 r8;81 __u64 r9;82 __u64 r10;83 __u64 r11;84 74 __u64 sp; /* r12 */ 85 75 __u64 r13; 86 __u64 r14;87 __u64 r15;88 __u64 r16;89 __u64 r17;90 __u64 r18;91 __u64 r19;92 __u64 r20;93 __u64 r21;94 __u64 r22;95 __u64 r23;96 __u64 r24;97 __u64 r25;98 __u64 r26;99 __u64 r27;100 __u64 r28;101 __u64 r29;102 __u64 r30;103 __u64 r31;104 76 105 77 /* … … 112 84 __u64 b4; 113 85 __u64 b5; 114 __u64 b6;115 __u64 b7;116 86 117 87 /* -
arch/ia64/src/context.S
r6c4024f rba1b7393 33 33 34 34 context_save: 35 alloc loc0 = ar.pfs, 1, 11, 0, 035 alloc loc0 = ar.pfs, 1, 8, 0, 0 36 36 mov loc1 = ar.unat ;; 37 37 /* loc2 */ … … 59 59 60 60 mov loc6 = ar.lc 61 mov loc7 = ar.ec62 mov loc8 = ar.ccv63 mov loc9 = ar.csd64 mov loc10 = ar.ssd65 61 66 62 /* … … 75 71 st8 [in0] = loc5, 8 ;; /* save ar.rnat */ 76 72 st8 [in0] = loc6, 8 ;; /* save ar.lc */ 77 st8 [in0] = loc7, 8 ;; /* save ar.ec */78 st8 [in0] = loc8, 8 ;; /* save ar.ccv */79 st8 [in0] = loc9, 8 ;; /* save ar.csd */80 st8 [in0] = loc10, 8 ;; /* save ar.ssd */81 73 82 74 /* … … 84 76 */ 85 77 st8.spill [in0] = r1, 8 ;; 86 st8.spill [in0] = r2, 8 ;;87 st8.spill [in0] = r3, 8 ;;88 78 st8.spill [in0] = r4, 8 ;; 89 79 st8.spill [in0] = r5, 8 ;; 90 80 st8.spill [in0] = r6, 8 ;; 91 81 st8.spill [in0] = r7, 8 ;; 92 st8.spill [in0] = r8, 8 ;;93 st8.spill [in0] = r9, 8 ;;94 st8.spill [in0] = r10, 8 ;;95 st8.spill [in0] = r11, 8 ;;96 82 st8.spill [in0] = r12, 8 ;; /* save sp */ 97 83 st8.spill [in0] = r13, 8 ;; 98 st8.spill [in0] = r14, 8 ;;99 st8.spill [in0] = r15, 8 ;;100 st8.spill [in0] = r16, 8 ;;101 st8.spill [in0] = r17, 8 ;;102 st8.spill [in0] = r18, 8 ;;103 st8.spill [in0] = r19, 8 ;;104 st8.spill [in0] = r20, 8 ;;105 st8.spill [in0] = r21, 8 ;;106 st8.spill [in0] = r22, 8 ;;107 st8.spill [in0] = r23, 8 ;;108 st8.spill [in0] = r24, 8 ;;109 st8.spill [in0] = r25, 8 ;;110 st8.spill [in0] = r26, 8 ;;111 st8.spill [in0] = r27, 8 ;;112 st8.spill [in0] = r28, 8 ;;113 st8.spill [in0] = r29, 8 ;;114 st8.spill [in0] = r30, 8 ;;115 st8.spill [in0] = r31, 8 ;;116 84 117 85 mov loc3 = ar.unat ;; … … 133 101 mov loc7 = b5 ;; 134 102 st8 [in0] = loc7, 8 135 mov loc8 = b6 ;;136 st8 [in0] = loc8, 8137 mov loc9 = b7 ;;138 st8 [in0] = loc9, 8139 103 140 104 /* … … 151 115 152 116 context_restore: 153 alloc loc0 = ar.pfs, 1, 11, 0, 0 ;;117 alloc loc0 = ar.pfs, 1, 8, 0, 0 ;; 154 118 155 119 ld8 loc0 = [in0], 8 ;; /* load ar.pfs */ … … 160 124 ld8 loc5 = [in0], 8 ;; /* load ar.rnat */ 161 125 ld8 loc6 = [in0], 8 ;; /* load ar.lc */ 162 ld8 loc7 = [in0], 8 ;; /* load ar.ec */163 ld8 loc8 = [in0], 8 ;; /* load ar.ccv */164 ld8 loc9 = [in0], 8 ;; /* load ar.csd */165 ld8 loc10 = [in0], 8 ;; /* load ar.ssd */166 126 167 127 .auto … … 185 145 mov ar.unat = loc2 ;; 186 146 mov ar.lc = loc6 187 mov ar.ec = loc7188 mov ar.ccv = loc8189 mov ar.csd = loc9190 mov ar.ssd = loc10191 147 192 148 /* … … 194 150 */ 195 151 ld8.fill r1 = [in0], 8 ;; 196 ld8.fill r2 = [in0], 8 ;;197 ld8.fill r3 = [in0], 8 ;;198 152 ld8.fill r4 = [in0], 8 ;; 199 153 ld8.fill r5 = [in0], 8 ;; 200 154 ld8.fill r6 = [in0], 8 ;; 201 155 ld8.fill r7 = [in0], 8 ;; 202 ld8.fill r8 = [in0], 8 ;;203 ld8.fill r9 = [in0], 8 ;;204 ld8.fill r10 = [in0], 8 ;;205 ld8.fill r11 = [in0], 8 ;;206 156 ld8.fill r12 = [in0], 8 ;; /* restore sp */ 207 157 ld8.fill r13 = [in0], 8 ;; 208 ld8.fill r14 = [in0], 8 ;;209 ld8.fill r15 = [in0], 8 ;;210 ld8.fill r16 = [in0], 8 ;;211 ld8.fill r17 = [in0], 8 ;;212 ld8.fill r18 = [in0], 8 ;;213 ld8.fill r19 = [in0], 8 ;;214 ld8.fill r20 = [in0], 8 ;;215 ld8.fill r21 = [in0], 8 ;;216 ld8.fill r22 = [in0], 8 ;;217 ld8.fill r23 = [in0], 8 ;;218 ld8.fill r24 = [in0], 8 ;;219 ld8.fill r25 = [in0], 8 ;;220 ld8.fill r26 = [in0], 8 ;;221 ld8.fill r27 = [in0], 8 ;;222 ld8.fill r28 = [in0], 8 ;;223 ld8.fill r29 = [in0], 8 ;;224 ld8.fill r30 = [in0], 8 ;;225 ld8.fill r31 = [in0], 8 ;;226 158 227 159 /* … … 240 172 ld8 loc7 = [in0], 8 ;; 241 173 mov b5 = loc7 242 ld8 loc8 = [in0], 8 ;;243 mov b6 = loc8244 ld8 loc9 = [in0], 8 ;;245 mov b7 = loc9246 174 247 175 /* -
arch/ia64/src/dummy.s
r6c4024f rba1b7393 45 45 .global fpu_enable 46 46 .global fpu_disable 47 .glo abl fpu_init47 .global fpu_init 48 48 49 49 before_thread_runs_arch:
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