Changeset bc314be8 in mainline


Ignore:
Timestamp:
2006-03-05T16:21:36Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
83d2d0e
Parents:
9e5938dc
Message:

ia64 work.

Change heavyweight interrupt handler to use bank 0 registers instead of AR.KR0 and AR.KR1.
This prevents userspace from the possibility to see what addresses are being used by kernel.

Store kernel stack address in bank 0 r23 instead of AR.KR7. Again, userspace will not be
able to read the address of its kernel stack.

Increase FRAME_SIZE to 64K as this is the first supported page size in which will fit
thread's combined register and memory stack. (RSE can write out as many as 16K.)

Location:
arch/ia64
Files:
4 edited

Legend:

Unmodified
Added
Removed

  • arch/ia64/include/mm/frame.h

    r9e5938dc rbc314be8  
    3030#define __ia64_FRAME_H__
    3131
    32 #define FRAME_WIDTH   14        /* 16K */
     32/*
     33 * Frame is defined to be 64K long.
     34 * Such a relatively big frame size is used because of kernel stack requirements
     35 * and organization. Portion of the stack reserved for RSE must be at least 16K
     36 * long. If the memory stack is to have some space allocated, the next available
     37 * frame size (i.e. 64K) needs to be used.
     38 */
     39#define FRAME_WIDTH   16        /* 64K */
    3340#define FRAME_SIZE              (1<<FRAME_WIDTH)
    3441

  • arch/ia64/include/register.h

    r9e5938dc rbc314be8  
    4242#define PSR_RT_MASK     (1<<27)
    4343#define PSR_IT_MASK     0x0000001000000000
    44 
    45 
    4644
    4745/** Application registers. */

  • arch/ia64/src/ivt.S

    r9e5938dc rbc314be8  
    3838#endif
    3939
     40/** Partitioning of bank 0 registers. */
     41#define R_OFFS          r16
     42#define R_HANDLER       r17
     43#define R_RET           r18
     44#define R_KSTACK        r23     /* keep in sync with before_thread_runs_arch() */
     45
    4046/** Heavyweight interrupt handler
    4147 *
    … …  
    5561.macro HEAVYWEIGHT_HANDLER offs, handler=universal_handler
    5662    .org ivt + \offs
    57         mov r24 = \offs
    58         movl r25 = \handler ;;
    59         mov ar.k0 = r24
    60         mov ar.k1 = r25
     63        mov R_OFFS = \offs
     64        movl R_HANDLER = \handler ;;
    6165        br heavyweight_handler
    6266.endm
    … …  
    6569heavyweight_handler:
    6670    /* 1. copy interrupt registers into bank 0 */
     71   
     72        /*
     73         * Note that r24-r31 from bank0 can be used only as long as PSR.ic = 0.
     74         */
    6775        mov r24 = cr.iip
    6876        mov r25 = cr.ipsr
    … …  
    118126       
    119127    /* steps 6 - 15 are done by heavyweight_handler_inner() */
    120         mov r24 = b0            /* save b0 belonging to interrupted context */
    121         mov r26 = ar.k0
    122         mov r25 = ar.k1
    123         br.call.sptk.many rp = heavyweight_handler_inner
    124 0:      mov b0 = r24            /* restore b0 belonging to the interrupted context */
     128        mov R_RET = b0          /* save b0 belonging to interrupted context */
     129        br.call.sptk.many b0 = heavyweight_handler_inner
     1300:      mov b0 = R_RET          /* restore b0 belonging to the interrupted context */
    125131
    126132    /* 16. RSE switch to interrupted context */
    … …  
    185191       
    186192        /* bank 0 is going to be shadowed, copy essential data from there */
    187         mov loc1 = r24  /* b0 belonging to interrupted context */
    188         mov loc2 = r25
    189         mov out0 = r26
     193        mov loc1 = R_RET        /* b0 belonging to interrupted context */
     194        mov loc2 = R_HANDLER
     195        mov out0 = R_OFFS
    190196       
    191197        add out1 = STACK_SCRATCH_AREA_SIZE, r12
    … …  
    324330        srlz.d
    325331
    326         mov r24 = loc1
     332        mov R_RET = loc1
    327333        mov ar.pfs = loc0
    328334        br.ret.sptk.many b0

  • arch/ia64/src/proc/scheduler.c

    r9e5938dc rbc314be8  
    3030#include <proc/thread.h>
    3131#include <arch.h>
     32#include <arch/register.h>
    3233#include <arch/mm/tlb.h>
    3334#include <config.h>
    3435#include <align.h>
    3536
    36 /** Record kernel stack address in ar.k7 and make sure it is mapped in DTR. */
     37/** Record kernel stack address in bank 0 r23 and make sure it is mapped in DTR. */
    3738void before_thread_runs_arch(void)
    3839{
    … …  
    5051       
    5152        /*
    52          * Record address of kernel stack to ar.k7
    53          * where it will be found after switch
    54          * from userspace.
     53         * Record address of kernel stack to bank 0 r23
     54         * where it will be found after switch from userspace.
    5555         */
    56         __asm__ volatile ("mov ar.k7 = %0\n" : : "r" (THREAD->kstack));
     56        __asm__ volatile (
     57                "bsw.0\n"
     58                "mov r23 = %0\n"
     59                "bsw.1\n"
     60                 : : "r" (THREAD->kstack));
    5761}
    5862
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