Changeset bc314be8 in mainline for arch/ia64/src/ivt.S

Timestamp:

2006-03-05T16:21:36Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

83d2d0e

Parents:

9e5938dc

Message:

ia64 work.

Change heavyweight interrupt handler to use bank 0 registers instead of AR.KR0 and AR.KR1.
This prevents userspace from the possibility to see what addresses are being used by kernel.

Store kernel stack address in bank 0 r23 instead of AR.KR7. Again, userspace will not be
able to read the address of its kernel stack.

Increase FRAME_SIZE to 64K as this is the first supported page size in which will fit
thread's combined register and memory stack. (RSE can write out as many as 16K.)

File:

• arch/ia64/src/ivt.S (modified) (6 diffs)

arch/ia64/src/ivt.S

@@ -38 +38 @@
 #endif
 
+/** Partitioning of bank 0 registers. */
+#define R_OFFS          r16
+#define R_HANDLER       r17
+#define R_RET           r18
+#define R_KSTACK        r23     /* keep in sync with before_thread_runs_arch() */
+
 /** Heavyweight interrupt handler
  *
@@ -55 +61 @@
 .macro HEAVYWEIGHT_HANDLER offs, handler=universal_handler
     .org ivt + \offs
-        mov r24 = \offs
-        movl r25 = \handler ;;
-        mov ar.k0 = r24
-        mov ar.k1 = r25
+        mov R_OFFS = \offs
+        movl R_HANDLER = \handler ;;
         br heavyweight_handler
 .endm
@@ -65 +69 @@
 heavyweight_handler:
     /* 1. copy interrupt registers into bank 0 */
+    
+        /*
+         * Note that r24-r31 from bank0 can be used only as long as PSR.ic = 0.
+         */
         mov r24 = cr.iip
         mov r25 = cr.ipsr
@@ -118 +126 @@
         
     /* steps 6 - 15 are done by heavyweight_handler_inner() */
-        mov r24 = b0            /* save b0 belonging to interrupted context */
-        mov r26 = ar.k0
-        mov r25 = ar.k1
-        br.call.sptk.many rp = heavyweight_handler_inner
-0:      mov b0 = r24            /* restore b0 belonging to the interrupted context */
+        mov R_RET = b0          /* save b0 belonging to interrupted context */
+        br.call.sptk.many b0 = heavyweight_handler_inner
+0:      mov b0 = R_RET          /* restore b0 belonging to the interrupted context */
 
     /* 16. RSE switch to interrupted context */
@@ -185 +191 @@
         
         /* bank 0 is going to be shadowed, copy essential data from there */
-        mov loc1 = r24  /* b0 belonging to interrupted context */
-        mov loc2 = r25
-        mov out0 = r26
+        mov loc1 = R_RET        /* b0 belonging to interrupted context */
+        mov loc2 = R_HANDLER
+        mov out0 = R_OFFS
         
         add out1 = STACK_SCRATCH_AREA_SIZE, r12
@@ -324 +330 @@
         srlz.d
 
-        mov r24 = loc1
+        mov R_RET = loc1
         mov ar.pfs = loc0
         br.ret.sptk.many b0