Changeset bc314be8 in mainline for arch/ia64/src/proc/scheduler.c

Timestamp:

2006-03-05T16:21:36Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

83d2d0e

Parents:

9e5938dc

Message:

ia64 work.

Change heavyweight interrupt handler to use bank 0 registers instead of AR.KR0 and AR.KR1.
This prevents userspace from the possibility to see what addresses are being used by kernel.

Store kernel stack address in bank 0 r23 instead of AR.KR7. Again, userspace will not be
able to read the address of its kernel stack.

Increase FRAME_SIZE to 64K as this is the first supported page size in which will fit
thread's combined register and memory stack. (RSE can write out as many as 16K.)

File:

• arch/ia64/src/proc/scheduler.c (modified) (2 diffs)

arch/ia64/src/proc/scheduler.c

@@ -30 +30 @@
 #include <proc/thread.h>
 #include <arch.h>
+#include <arch/register.h>
 #include <arch/mm/tlb.h>
 #include <config.h>
 #include <align.h>
 
-/** Record kernel stack address in ar.k7 and make sure it is mapped in DTR. */
+/** Record kernel stack address in bank 0 r23 and make sure it is mapped in DTR. */
 void before_thread_runs_arch(void)
 {
@@ -50 +51 @@
         
         /*
-         * Record address of kernel stack to ar.k7
-         * where it will be found after switch
-         * from userspace.
+         * Record address of kernel stack to bank 0 r23
+         * where it will be found after switch from userspace.
          */
-        __asm__ volatile ("mov ar.k7 = %0\n" : : "r" (THREAD->kstack));
+        __asm__ volatile (
+                "bsw.0\n"
+                "mov r23 = %0\n"
+                "bsw.1\n"
+                 : : "r" (THREAD->kstack));
 }