Changes in / [62b20f1:bee2d4c] in mainline
- Location:
- kernel/arch/ia32
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia32/include/asm.h
r62b20f1 rbee2d4c 425 425 426 426 extern void paging_on(void); 427 extern void interrupt_handlers(void);428 427 extern void enable_l_apic_in_msr(void); 429 428 … … 431 430 extern void asm_fake_loop(uint32_t); 432 431 432 extern uintptr_t int_0; 433 extern uintptr_t int_1; 434 extern uintptr_t int_2; 435 extern uintptr_t int_3; 436 extern uintptr_t int_4; 437 extern uintptr_t int_5; 438 extern uintptr_t int_6; 439 extern uintptr_t int_7; 440 extern uintptr_t int_8; 441 extern uintptr_t int_9; 442 extern uintptr_t int_10; 443 extern uintptr_t int_11; 444 extern uintptr_t int_12; 445 extern uintptr_t int_13; 446 extern uintptr_t int_14; 447 extern uintptr_t int_15; 448 extern uintptr_t int_16; 449 extern uintptr_t int_17; 450 extern uintptr_t int_18; 451 extern uintptr_t int_19; 452 extern uintptr_t int_20; 453 extern uintptr_t int_21; 454 extern uintptr_t int_22; 455 extern uintptr_t int_23; 456 extern uintptr_t int_24; 457 extern uintptr_t int_25; 458 extern uintptr_t int_26; 459 extern uintptr_t int_27; 460 extern uintptr_t int_28; 461 extern uintptr_t int_29; 462 extern uintptr_t int_30; 463 extern uintptr_t int_31; 464 extern uintptr_t int_32; 465 extern uintptr_t int_33; 466 extern uintptr_t int_34; 467 extern uintptr_t int_35; 468 extern uintptr_t int_36; 469 extern uintptr_t int_37; 470 extern uintptr_t int_38; 471 extern uintptr_t int_39; 472 extern uintptr_t int_40; 473 extern uintptr_t int_41; 474 extern uintptr_t int_42; 475 extern uintptr_t int_43; 476 extern uintptr_t int_44; 477 extern uintptr_t int_45; 478 extern uintptr_t int_46; 479 extern uintptr_t int_47; 480 extern uintptr_t int_48; 481 extern uintptr_t int_49; 482 extern uintptr_t int_50; 483 extern uintptr_t int_51; 484 extern uintptr_t int_52; 485 extern uintptr_t int_53; 486 extern uintptr_t int_54; 487 extern uintptr_t int_55; 488 extern uintptr_t int_56; 489 extern uintptr_t int_57; 490 extern uintptr_t int_58; 491 extern uintptr_t int_59; 492 extern uintptr_t int_60; 493 extern uintptr_t int_61; 494 extern uintptr_t int_62; 495 extern uintptr_t int_63; 496 433 497 #endif 434 498 -
kernel/arch/ia32/include/interrupt.h
r62b20f1 rbee2d4c 75 75 * The strange order of the GPRs is given by the requirement to use the 76 76 * istate structure for both regular interrupts and exceptions as well 77 * as for syscall handler which use this order as an optimization.77 * as for syscall handlers which use this order as an optimization. 78 78 */ 79 79 uint32_t edx; -
kernel/arch/ia32/src/asm.S
r62b20f1 rbee2d4c 44 44 .global paging_on 45 45 .global enable_l_apic_in_msr 46 .global interrupt_handlers47 46 .global memsetb 48 47 .global memsetw … … 272 271 * vectors starting at vector i. 273 272 * 274 * The handlers setup data segment registers 275 * and call exc_dispatch(). 276 * 277 */ 278 #define INTERRUPT_ALIGN 256 279 280 .macro handler i n 273 */ 274 275 .macro handler i 276 .global int_\i 277 int_\i: 281 278 .ifeq \i - 0x30 282 279 /* Syscall handler */ … … 475 472 476 473 .endif 477 478 .align INTERRUPT_ALIGN479 .if (\n - \i) - 1480 handler "(\i + 1)", \n481 .endif482 474 .endm 483 475 484 /* Keep in sync with pm.h! */ 485 #define IDT_ITEMS 64 486 487 .align INTERRUPT_ALIGN 476 #define LIST_0_63 \ 477 0, 1, 2, 3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,\ 478 28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,\ 479 53,54,55,56,57,58,59,60,61,62,63 480 488 481 interrupt_handlers: 489 h_start: 490 handler 0 IDT_ITEMS491 h_end: 482 .irp cnt, LIST_0_63 483 handler \cnt 484 .endr 492 485 493 486 /** Print Unicode character to EGA display. … … 638 631 ret 639 632 640 .data641 .global interrupt_handler_size642 643 interrupt_handler_size: .long (h_end - h_start) / IDT_ITEMS -
kernel/arch/ia32/src/pm.c
r62b20f1 rbee2d4c 139 139 d->access |= DPL_USER; 140 140 } 141 142 idt_setoffset(d, ((uintptr_t) interrupt_handlers) +143 i * interrupt_handler_size);144 141 } 145 } 146 142 143 d = &idt[0]; 144 idt_setoffset(d++, (uintptr_t) &int_0); 145 idt_setoffset(d++, (uintptr_t) &int_1); 146 idt_setoffset(d++, (uintptr_t) &int_2); 147 idt_setoffset(d++, (uintptr_t) &int_3); 148 idt_setoffset(d++, (uintptr_t) &int_4); 149 idt_setoffset(d++, (uintptr_t) &int_5); 150 idt_setoffset(d++, (uintptr_t) &int_6); 151 idt_setoffset(d++, (uintptr_t) &int_7); 152 idt_setoffset(d++, (uintptr_t) &int_8); 153 idt_setoffset(d++, (uintptr_t) &int_9); 154 idt_setoffset(d++, (uintptr_t) &int_10); 155 idt_setoffset(d++, (uintptr_t) &int_11); 156 idt_setoffset(d++, (uintptr_t) &int_12); 157 idt_setoffset(d++, (uintptr_t) &int_13); 158 idt_setoffset(d++, (uintptr_t) &int_14); 159 idt_setoffset(d++, (uintptr_t) &int_15); 160 idt_setoffset(d++, (uintptr_t) &int_16); 161 idt_setoffset(d++, (uintptr_t) &int_17); 162 idt_setoffset(d++, (uintptr_t) &int_18); 163 idt_setoffset(d++, (uintptr_t) &int_19); 164 idt_setoffset(d++, (uintptr_t) &int_20); 165 idt_setoffset(d++, (uintptr_t) &int_21); 166 idt_setoffset(d++, (uintptr_t) &int_22); 167 idt_setoffset(d++, (uintptr_t) &int_23); 168 idt_setoffset(d++, (uintptr_t) &int_24); 169 idt_setoffset(d++, (uintptr_t) &int_25); 170 idt_setoffset(d++, (uintptr_t) &int_26); 171 idt_setoffset(d++, (uintptr_t) &int_27); 172 idt_setoffset(d++, (uintptr_t) &int_28); 173 idt_setoffset(d++, (uintptr_t) &int_29); 174 idt_setoffset(d++, (uintptr_t) &int_30); 175 idt_setoffset(d++, (uintptr_t) &int_31); 176 idt_setoffset(d++, (uintptr_t) &int_32); 177 idt_setoffset(d++, (uintptr_t) &int_33); 178 idt_setoffset(d++, (uintptr_t) &int_34); 179 idt_setoffset(d++, (uintptr_t) &int_35); 180 idt_setoffset(d++, (uintptr_t) &int_36); 181 idt_setoffset(d++, (uintptr_t) &int_37); 182 idt_setoffset(d++, (uintptr_t) &int_38); 183 idt_setoffset(d++, (uintptr_t) &int_39); 184 idt_setoffset(d++, (uintptr_t) &int_40); 185 idt_setoffset(d++, (uintptr_t) &int_41); 186 idt_setoffset(d++, (uintptr_t) &int_42); 187 idt_setoffset(d++, (uintptr_t) &int_43); 188 idt_setoffset(d++, (uintptr_t) &int_44); 189 idt_setoffset(d++, (uintptr_t) &int_45); 190 idt_setoffset(d++, (uintptr_t) &int_46); 191 idt_setoffset(d++, (uintptr_t) &int_47); 192 idt_setoffset(d++, (uintptr_t) &int_48); 193 idt_setoffset(d++, (uintptr_t) &int_49); 194 idt_setoffset(d++, (uintptr_t) &int_50); 195 idt_setoffset(d++, (uintptr_t) &int_51); 196 idt_setoffset(d++, (uintptr_t) &int_52); 197 idt_setoffset(d++, (uintptr_t) &int_53); 198 idt_setoffset(d++, (uintptr_t) &int_54); 199 idt_setoffset(d++, (uintptr_t) &int_55); 200 idt_setoffset(d++, (uintptr_t) &int_56); 201 idt_setoffset(d++, (uintptr_t) &int_57); 202 idt_setoffset(d++, (uintptr_t) &int_58); 203 idt_setoffset(d++, (uintptr_t) &int_59); 204 idt_setoffset(d++, (uintptr_t) &int_60); 205 idt_setoffset(d++, (uintptr_t) &int_61); 206 idt_setoffset(d++, (uintptr_t) &int_62); 207 idt_setoffset(d++, (uintptr_t) &int_63); 208 } 147 209 148 210 /* Clean IOPL(12,13) and NT(14) flags in EFLAGS register */
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