Changeset bf38143 in mainline for uspace/drv/audio/sb16/dsp.c


Ignore:
Timestamp:
2011-09-26T15:26:48Z (13 years ago)
Author:
Jan Vesely <jano.vesely@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
ce1e5ea
Parents:
bde691c
Message:

sb16: Use new sb_dsp_t structure.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/audio/sb16/dsp.c

    rbde691c rbf38143  
    3434
    3535#include <libarch/ddi.h>
     36#include "ddf_log.h"
     37#include "dsp_commands.h"
    3638#include "dsp.h"
    3739
    38 int dsp_play_direct(sb16_regs_t *regs, const uint8_t *data, size_t size,
     40
     41#ifndef DSP_RETRY_COUNT
     42#define DSP_RETRY_COUNT 100
     43#endif
     44
     45#define DSP_RESET_RESPONSE 0xaa
     46
     47static inline int sb_dsp_read(sb_dsp_t *dsp, uint8_t *data)
     48{
     49        assert(data);
     50        assert(dsp);
     51        uint8_t status;
     52        size_t attempts = DSP_RETRY_COUNT;
     53        do {
     54                status = pio_read_8(&dsp->regs->dsp_read_status);
     55        } while (--attempts && ((status & DSP_READ_READY) == 0));
     56
     57        if ((status & DSP_READ_READY) == 0)
     58                return EIO;
     59
     60        *data = pio_read_8(&dsp->regs->dsp_data_read);
     61        return EOK;
     62}
     63/*----------------------------------------------------------------------------*/
     64static inline int sb_dsp_write(sb_dsp_t *dsp, uint8_t data)
     65{
     66        assert(dsp);
     67        uint8_t status;
     68        size_t attempts = DSP_RETRY_COUNT;
     69        do {
     70                status = pio_read_8(&dsp->regs->dsp_write);
     71        } while (--attempts && ((status & DSP_WRITE_BUSY) != 0));
     72
     73        if ((status & DSP_WRITE_BUSY))
     74                return EIO;
     75
     76        pio_write_8(&dsp->regs->dsp_write, data);
     77        return EOK;
     78}
     79/*----------------------------------------------------------------------------*/
     80static inline void sb_dsp_reset(sb_dsp_t *dsp)
     81{
     82        assert(dsp);
     83        /* Reset DSP, see Chapter 2 of Sound Blaster HW programming guide */
     84        pio_write_8(&dsp->regs->dsp_reset, 1);
     85        udelay(3); /* Keep reset for 3 us */
     86        pio_write_8(&dsp->regs->dsp_reset, 0);
     87}
     88/*----------------------------------------------------------------------------*/
     89int sb_dsp_init(sb_dsp_t *dsp, sb16_regs_t *regs)
     90{
     91        assert(dsp);
     92        dsp->regs = regs;
     93        sb_dsp_reset(dsp);
     94        /* "DSP takes about 100 microseconds to initialize itself" */
     95        udelay(100);
     96        uint8_t response;
     97        const int ret = sb_dsp_read(dsp, &response);
     98        if (ret != EOK) {
     99                ddf_log_error("Failed to read DSP reset response value.\n");
     100                return ret;
     101        }
     102        if (response != DSP_RESET_RESPONSE) {
     103                ddf_log_error("Invalid DSP reset response: %x.\n", response);
     104                return EIO;
     105        }
     106
     107        /* Get DSP version number */
     108        sb_dsp_write(dsp, DSP_VERSION);
     109        sb_dsp_read(dsp, &dsp->version.major);
     110        sb_dsp_read(dsp, &dsp->version.minor);
     111        return EOK;
     112}
     113/*----------------------------------------------------------------------------*/
     114int sb_dsp_play_direct(sb_dsp_t *dsp, const uint8_t *data, size_t size,
    39115    unsigned sampling_rate, unsigned channels, unsigned bit_depth)
    40116{
     117        assert(dsp);
    41118        if (channels != 1 || bit_depth != 8)
    42119                return EIO;
     
    44121        const unsigned wait_period = 1000000 / sampling_rate;
    45122        while (size--) {
    46                 pio_write_8(&regs->dsp_write, DIRECT_8B_OUTPUT);
    47                 pio_write_8(&regs->dsp_write, *data++);
     123                pio_write_8(&dsp->regs->dsp_write, DIRECT_8B_OUTPUT);
     124                pio_write_8(&dsp->regs->dsp_write, *data++);
    48125                udelay(wait_period);
    49126        }
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