Changes in uspace/drv/nic/rtl8139/defs.h [5cd3d67:bf84871] in mainline

File:

• uspace/drv/nic/rtl8139/defs.h (modified) (14 diffs)

uspace/drv/nic/rtl8139/defs.h

@@ -29 +29 @@
 /** @file rtl8139_defs.h
  *
- * Registers, bit positions and masks definition
- * of the RTL8139 network family cards
- */
-
-#ifndef RTL8139_DEFS_H_
-#define RTL8139_DEFS_H_
-
+ *  Registers, bit positions and masks definition of the RTL8139 network family 
+ *  cards
+ */
+
+#ifndef RTL8139_DEFS_H_INCLUDED_
+#define RTL8139_DEFS_H_INCLUDED_
 #include <sys/types.h>
 #include <libarch/ddi.h>
 
-/** Size of RTL8139 registers address space */
-#define RTL8139_IO_SIZE  256
-
-/** Maximal transmitted frame length
- *
- * Maximal transmitted frame length in bytes
- * allowed according to the RTL8139 documentation
- * (see SIZE part of TSD documentation).
- *
- */
-#define RTL8139_FRAME_MAX_LENGTH  1792
+
+/** The size of RTL8139 registers address space */
+#define RTL8139_IO_SIZE 256
+
+/** The maximal transmitted packet length in bytes allowed according to RTL8139
+ *  documentation (see SIZE part of TSD documentation)
+ */
+#define RTL8139_PACKET_MAX_LENGTH 1792
+
 
 /** HW version
  *
- * As can be detected from HWVERID part of TCR
- * (Transmit Configuration Register).
- *
- */
-typedef enum {
+ *  as can be detected from HWVERID part of TCR
+ *  (Transmit Configuration Register)
+ */
+enum rtl8139_version_id {
         RTL8139 = 0,          /**< RTL8139 */
         RTL8139A,             /**< RTL8139A */
@@ -70 +66 @@
         RTL8101,              /**< RTL8101 */
         RTL8139_VER_COUNT     /**< Count of known RTL versions, the last value */
-} rtl8139_version_id_t;
+};
+
+extern const char* model_names[RTL8139_VER_COUNT];
 
 /** Registers of RTL8139 family card offsets from the memory address base */
@@ -77 +75 @@
         MAC0  = IDR0,    /**< Alias for IDR0 */
 
-        // 0x06 - 0x07 reserved
+        // 0x6 - 0x7 reserved
 
         MAR0    = 0x08,  /**< Multicast mask registers 8 1b registers sequence */
@@ -96 +94 @@
 
         CR      = 0x37,  /**< Command register, 1b */
-        CAPR    = 0x38,  /**< Current address of frame read, 2b */
+        CAPR    = 0x38,  /**< Current address of packet read, 2b */
         CBA     = 0x3a,  /**< Current buffer address, 2b */
 
@@ -215 +213 @@
         pio_write_8(io_base + CR9346, RTL8139_REGS_LOCKED);
 }
-
 /** Allow to change Config0-4 and BMCR register  */
 static inline void rtl8139_regs_unlock(void *io_base)
@@ -285 +282 @@
         RCR_MulERINT = 1 << 17,    /**< Multiple early interrupt select */
 
-        /** Minimal error frame length (1 = 8B, 0 = 64B). If AER/AR is set, RER8
+        /** Minimal error packet length (1 = 8B, 0 = 64B). If AER/AR is set, RER8
          * is "Don't care"
          */
@@ -305 +302 @@
 
         RCR_WRAP              = 1 << 7,  /**< Rx buffer wrapped */
-        RCR_ACCEPT_ERROR      = 1 << 5,  /**< Accept error frame */
-        RCR_ACCEPT_RUNT       = 1 << 4,  /**< Accept Runt (8-64 bytes) frames */
+        RCR_ACCEPT_ERROR      = 1 << 5,  /**< Accept error packet */
+        RCR_ACCEPT_RUNT       = 1 << 4,  /**< Accept Runt (8-64 bytes) packets */
         RCR_ACCEPT_BROADCAST  = 1 << 3,  /**< Accept broadcast */
         RCR_ACCEPT_MULTICAST  = 1 << 2,  /**< Accept multicast */
         RCR_ACCEPT_PHYS_MATCH = 1 << 1,  /**< Accept device MAC address match */
-        RCR_ACCEPT_ALL_PHYS   = 1 << 0,  /**< Accept all frames with 
+        RCR_ACCEPT_ALL_PHYS   = 1 << 0,  /**< Accept all packets with 
                                           * phys. desticnation 
                                                                           */
@@ -365 +362 @@
         ANAR_ACK          = (1 << 14),  /**< Capability reception acknowledge */
         ANAR_REMOTE_FAULT = (1 << 13),  /**< Remote fault detection capability */
-        ANAR_PAUSE        = (1 << 10),  /**< Symetric pause frame capability */
+        ANAR_PAUSE        = (1 << 10),  /**< Symetric pause packet capability */
         ANAR_100T4        = (1 << 9),   /**< T4, not supported by the device */
         ANAR_100TX_FD     = (1 << 8),   /**< 100BASE_TX full duplex */
@@ -402 +399 @@
         CONFIG3_GNT_SELECT = (1 << 7),  /**< Gnt select */
         CONFIG3_PARM_EN    = (1 << 6),  /**< Parameter enabled (100MBit mode) */
-        CONFIG3_MAGIC      = (1 << 5),  /**< WoL Magic frame enable */
+        CONFIG3_MAGIC      = (1 << 5),  /**< WoL Magic packet enable */
         CONFIG3_LINK_UP    = (1 << 4),  /**< Wakeup if link is reestablished */
         CONFIG3_CLKRUN_EN  = (1 << 2),  /**< CLKRUN enabled */ /* TODO: check what does it mean */
@@ -419 +416 @@
 };
 
-/** Maximal runt frame size + 1 */
-#define RTL8139_RUNT_MAX_SIZE  64
-
-/** Bits in frame header */
-enum rtl8139_frame_header {
+/** Maximal runt packet size + 1 */
+#define RTL8139_RUNT_MAX_SIZE 64
+
+/** Bits in packet header */
+enum rtl8139_packet_header {
         RSR_MAR  = (1 << 15),  /**< Multicast received */
         RSR_PAM  = (1 << 14),  /**< Physical address match */
@@ -429 +426 @@
 
         RSR_ISE  = (1 << 5),   /**< Invalid symbol error, 100BASE-TX only */
-        RSR_RUNT = (1 << 4),   /**< Runt frame (< RTL8139_RUNT_MAX_SIZE bytes) */
-
-        RSR_LONG = (1 << 3),   /**< Long frame (size > 4k bytes) */
+        RSR_RUNT = (1 << 4),   /**< Runt packet (< RTL8139_RUNT_MAX_SIZE bytes) */
+
+        RSR_LONG = (1 << 3),   /**< Long packet (size > 4k bytes) */
         RSR_CRC  = (1 << 2),   /**< CRC error */
         RSR_FAE  = (1 << 1),   /**< Frame alignment error */
-        RSR_ROK  = (1 << 0)    /**< Good frame received */
+        RSR_ROK  = (1 << 0)    /**< Good packet received */
 };
 
@@ -454 +451 @@
                                                                           */
 
-        APPEND_CRC = 1 << 16,        /**< Append CRC at the end of a frame */
+        APPEND_CRC = 1 << 16,        /**< Append CRC at the end of a packet */
 
         MXTxDMA_SHIFT = 8,  /**< Max. DMA Burst per TxDMA shift, burst = 16^value */
@@ -462 +459 @@
         TX_RETRY_COUNT_SIZE  = 4,            /**< Retries before aborting size */
 
-        CLEAR_ABORT = 1 << 0    /**< Retransmit aborted frame at the last 
+        CLEAR_ABORT = 1 << 0    /**< Retransmit aborted packet at the last 
                                   *  transmitted descriptor 
                                                           */
@@ -473 +470 @@
 
 /** Mapping of HW version -> version ID */
-struct rtl8139_hwver_map {
-        uint32_t hwverid;             /**< HW version value in the register */
-        rtl8139_version_id_t ver_id;  /**< appropriate version id */
+struct rtl8139_hwver_map { 
+        uint32_t hwverid;                /**< HW version value in the register */
+        enum rtl8139_version_id ver_id;  /**< appropriate version id */
 };
 
 /** Mapping of HW version -> version ID */
 extern const struct rtl8139_hwver_map rtl8139_versions[RTL8139_VER_COUNT + 1];
-extern const char* model_names[RTL8139_VER_COUNT];
-
-/** Size in the frame header while copying from RxFIFO to Rx buffer */
-#define RTL8139_EARLY_SIZE  UINT16_C(0xfff0)
-
-/** The only supported pause frame time value */
-#define RTL8139_PAUSE_VAL  UINT16_C(0xFFFF)
-
-/** Size of the frame header in front of the received frame */
-#define RTL_FRAME_HEADER_SIZE  4
+
+/** Size in the packet header while copying from RxFIFO to Rx buffer */
+#define RTL8139_EARLY_SIZE UINT16_C(0xfff0)
+/** The only supported pause packet time value */
+#define RTL8139_PAUSE_VAL UINT16_C(0xFFFF)
+
+/** Size of the packet header in front of the received frame */
+#define RTL_PACKET_HEADER_SIZE 4
 
 /** 8k buffer */