Changes in kernel/arch/arm32/include/mm/page.h [7a0359b:c09adc10] in mainline
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kernel/arch/arm32/include/mm/page.h
r7a0359b rc09adc10 27 27 */ 28 28 29 /** @addtogroup arm32mm 29 /** @addtogroup arm32mm 30 30 * @{ 31 31 */ … … 40 40 #include <mm/mm.h> 41 41 #include <arch/exception.h> 42 #include <trace.h>43 42 44 43 #define PAGE_WIDTH FRAME_WIDTH … … 193 192 /** Sets the address of level 0 page table. 194 193 * 195 * @param pt Pointer to the page table to set. 196 * 197 */ 198 NO_TRACE static inline void set_ptl0_addr(pte_t *pt) 194 * @param pt Pointer to the page table to set. 195 */ 196 static inline void set_ptl0_addr(pte_t *pt) 199 197 { 200 198 asm volatile ( … … 207 205 /** Returns level 0 page table entry flags. 208 206 * 209 * @param pt Level 0 page table. 210 * @param i Index of the entry to return. 211 * 212 */ 213 NO_TRACE static inline int get_pt_level0_flags(pte_t *pt, size_t i) 207 * @param pt Level 0 page table. 208 * @param i Index of the entry to return. 209 */ 210 static inline int get_pt_level0_flags(pte_t *pt, size_t i) 214 211 { 215 212 pte_level0_t *p = &pt[i].l0; 216 213 int np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT); 217 214 218 215 return (np << PAGE_PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) | 219 216 (1 << PAGE_READ_SHIFT) | (1 << PAGE_WRITE_SHIFT) | … … 223 220 /** Returns level 1 page table entry flags. 224 221 * 225 * @param pt Level 1 page table. 226 * @param i Index of the entry to return. 227 * 228 */ 229 NO_TRACE static inline int get_pt_level1_flags(pte_t *pt, size_t i) 222 * @param pt Level 1 page table. 223 * @param i Index of the entry to return. 224 */ 225 static inline int get_pt_level1_flags(pte_t *pt, size_t i) 230 226 { 231 227 pte_level1_t *p = &pt[i].l1; 232 228 233 229 int dt = p->descriptor_type; 234 230 int ap = p->access_permission_0; 235 231 236 232 return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) | 237 233 ((ap == PTE_AP_USER_RO_KERNEL_RW) << PAGE_READ_SHIFT) | … … 245 241 } 246 242 243 247 244 /** Sets flags of level 0 page table entry. 248 245 * 249 * @param pt level 0 page table 250 * @param i index of the entry to be changed 251 * @param flags new flags 252 * 253 */ 254 NO_TRACE static inline void set_pt_level0_flags(pte_t *pt, size_t i, int flags) 246 * @param pt level 0 page table 247 * @param i index of the entry to be changed 248 * @param flags new flags 249 */ 250 static inline void set_pt_level0_flags(pte_t *pt, size_t i, int flags) 255 251 { 256 252 pte_level0_t *p = &pt[i].l0; 257 253 258 254 if (flags & PAGE_NOT_PRESENT) { 259 255 p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; … … 266 262 p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; 267 263 p->should_be_zero = 0; 268 264 } 269 265 } 270 266 … … 272 268 /** Sets flags of level 1 page table entry. 273 269 * 274 * We use same access rights for the whole page. When page 275 * is not preset we store 1 in acess_rigts_3 so that at least 276 * one bit is 1 (to mark correct page entry, see #PAGE_VALID_ARCH). 277 * 278 * @param pt Level 1 page table. 279 * @param i Index of the entry to be changed. 280 * @param flags New flags. 281 * 282 */ 283 NO_TRACE static inline void set_pt_level1_flags(pte_t *pt, size_t i, int flags) 270 * We use same access rights for the whole page. When page is not preset we 271 * store 1 in acess_rigts_3 so that at least one bit is 1 (to mark correct 272 * page entry, see #PAGE_VALID_ARCH). 273 * 274 * @param pt Level 1 page table. 275 * @param i Index of the entry to be changed. 276 * @param flags New flags. 277 */ 278 static inline void set_pt_level1_flags(pte_t *pt, size_t i, int flags) 284 279 { 285 280 pte_level1_t *p = &pt[i].l1; … … 292 287 p->access_permission_3 = p->access_permission_0; 293 288 } 294 289 295 290 p->cacheable = p->bufferable = (flags & PAGE_CACHEABLE) != 0; 296 291 297 292 /* default access permission */ 298 293 p->access_permission_0 = p->access_permission_1 = 299 294 p->access_permission_2 = p->access_permission_3 = 300 295 PTE_AP_USER_NO_KERNEL_RW; 301 296 302 297 if (flags & PAGE_USER) { 303 298 if (flags & PAGE_READ) {
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