Changeset c2b2de7 in mainline for uspace/drv/infrastructure/rootamdm37x/uhh.h

Timestamp:

2012-10-17T22:17:29Z (12 years ago)

Author:

Maurizio Lombardi <m.lombardi85@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

150a271

Parents:

6454ad47 (diff), 57912af3 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

merge changes from bbxm branch

File:

• uspace/drv/infrastructure/rootamdm37x/uhh.h (modified) (4 diffs)

uspace/drv/infrastructure/rootamdm37x/uhh.h

@@ -35 +35 @@
 #ifndef AMDM37x_UHH_H
 #define AMDM37x_UHH_H
+#include <macros.h>
 #include <sys/types.h>
 
@@ -42 +43 @@
 typedef struct {
         const ioport32_t revision;
-#define UHH_REVISION_MASK  0xf
-#define UHH_REVISION_MINOR_SHIFT  0
-#define UHH_REVISION_MAJOR_SHIFT  4
+#define UHH_REVISION_MINOR_MASK  0x0f
+#define UHH_REVISION_MAJOR_MASK  0xf0
 
-        uint32_t padd0_[3];
+        PADD32[3];
         ioport32_t sysconfig;
 #define UHH_SYSCONFIG_AUTOIDLE_FLAG  (1 << 0)
 #define UHH_SYSCONFIG_SOFTRESET_FLAG  (1 << 1)
 #define UHH_SYSCONFIG_ENWAKEUP_FLAG  (1 << 2)
+#define UHH_SYSCONFIG_SIDLE_MODE_MASK  (0x3 << 3)
+#define UHH_SYSCONFIG_SIDLE_MODE_FORCE  (0x0 << 3)
+#define UHH_SYSCONFIG_SIDLE_MODE_NO  (0x1 << 3)
+#define UHH_SYSCONFIG_SIDLE_MODE_SMART  (0x2 << 3)
 #define UHH_SYSCONFIG_CLOCKACTIVITY_FLAG  (1 << 8)
-#define UHH_SYSCONFIG_SIDLE_MODE_MASK  0x3
-#define UHH_SYSCONFIG_SIDLE_MODE_SHIFT  3
-#define UHH_SYSCONFIG_MIDLE_MODE_MASK  0x3
-#define UHH_SYSCONFIG_MIDLE_MODE_SHIFT  12
+#define UHH_SYSCONFIG_MIDLE_MODE_MASK  (0x3 << 12)
+#define UHH_SYSCONFIG_MIDLE_MODE_FORCE  (0x0 << 12)
+#define UHH_SYSCONFIG_MIDLE_MODE_NO  (0x1 << 12)
+#define UHH_SYSCONFIG_MIDLE_MODE_SMART  (0x2 << 12)
 
         const ioport32_t sysstatus;
@@ -62 +66 @@
 #define UHH_SYSSTATUS_EHCI_RESETDONE_FLAG  (1 << 2)
 
-        uint32_t padd1_[10];
+        PADD32[10];
         ioport32_t hostconfig;
 #define UHH_HOSTCONFIG_P1_ULPI_BYPASS_FLAG  (1 << 0)
@@ -77 +81 @@
 
         ioport32_t debug_csr;
-#define UHH_DEBUG_CSR_EHCI_FLADJ_MASK  (0x3f)
-#define UHH_DEBUG_CSR_EHCI_FLADJ_SHIFT  0
+#define UHH_DEBUG_CSR_EHCI_FLADJ_MASK  (0x3f << 0)
+#define UHH_DEBUG_CSR_EHCI_FLADJ(x)  ((x) & 0x3f)
 #define UHH_DEBUG_CSR_EHCI_SIMULATION_MODE_FLAG  (1 << 6)
 #define UHH_DEBUG_CSR_OHCI_CNTSEL_FLAG  (1 << 7)