Changeset c2efbb4 in mainline
- Timestamp:
- 2010-02-20T20:54:53Z (15 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 721d4e85, 95c4776
- Parents:
- f516bc2 (diff), b03a666 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - Files:
-
- 198 added
- 118 edited
- 1 moved
Legend:
- Unmodified
- Added
- Removed
-
HelenOS.config
rf516bc2 rc2efbb4 258 258 259 259 % Compiler 260 @ "gcc_cross" GNU C Compiler (cross-compiler) 260 261 @ "gcc_native" GNU C Compiler (native) 261 262 @ "clang" Clang … … 263 264 264 265 266 ## Cross-compiler target for abstract architecture 267 268 % Cross-compiler target 269 @ "arm32" ARM 32-bit 270 @ "ia32" Intel IA-32 271 @ "mips32" MIPS 32-bit 272 ! [PLATFORM=abs32le&COMPILER=gcc_cross] CROSS_TARGET (choice) 273 274 265 275 ## Kernel configuration 266 276 … … 284 294 285 295 % Software integer division support 286 ! [PLATFORM= ia32|PLATFORM=arm32|PLATFORM=ia64|PLATFORM=mips32|PLATFORM=ppc32] CONFIG_SOFTINT (y)296 ! [PLATFORM=abs32le|PLATFORM=ia32|PLATFORM=arm32|PLATFORM=ia64|PLATFORM=mips32|PLATFORM=ppc32] CONFIG_SOFTINT (y) 287 297 288 298 % ASID support … … 508 518 % Write core files 509 519 ! CONFIG_WRITE_CORE_FILES (n/y) 520 521 % Networking architecture 522 @ "none" No networking 523 @ "modular" Modular 524 @ "module" One module 525 ! NETWORKING (choice) 526 527 % DP8390 (NE2k) network interface 528 ! [NETWORKING=modular|NETWORKING=module] CONFIG_NETIF_DP8390 (y/n) 529 -
boot/Makefile.common
rf516bc2 rc2efbb4 85 85 COMPONENTS += $(USPACEDIR)/srv/fs/fat/fat 86 86 endif 87 88 CFG = 89 90 NET_SRVS = \ 91 $(USPACEDIR)/srv/net/net/net \ 92 $(USPACEDIR)/srv/net/netif/lo/lo \ 93 $(USPACEDIR)/srv/net/netif/dp8390/dp8390 \ 94 $(USPACEDIR)/srv/net/nil/eth/eth \ 95 $(USPACEDIR)/srv/net/nil/nildummy/nildummy \ 96 $(USPACEDIR)/srv/net/app/echo/echo 97 98 NET_APPS = \ 99 $(USPACEDIR)/srv/net/net/start/netstart \ 100 $(USPACEDIR)/srv/net/app/ping/ping \ 101 $(USPACEDIR)/srv/net/app/nettest1/nettest1 \ 102 $(USPACEDIR)/srv/net/app/nettest2/nettest2 103 104 ifneq ($(NETWORKING), none) 105 NET_CFG = \ 106 $(USPACEDIR)/srv/net/cfg/$(NETWORKING)/general \ 107 $(USPACEDIR)/srv/net/cfg/$(NETWORKING)/lo \ 108 $(USPACEDIR)/srv/net/cfg/$(NETWORKING)/ne2k 109 endif 110 111 ifeq ($(NETWORKING), module) 112 RD_APPS += $(NET_APPS) 113 114 RD_SRVS += $(NET_SRVS) 115 116 CFG += $(NET_CFG) 117 else 118 ifeq ($(NETWORKING), modular) 119 RD_APPS += $(NET_APPS) 120 121 RD_SRVS += $(NET_SRVS) 122 123 RD_SRVS += $(USPACEDIR)/srv/net/il/ip/ip \ 124 $(USPACEDIR)/srv/net/il/arp/arp \ 125 $(USPACEDIR)/srv/net/tl/udp/udp \ 126 $(USPACEDIR)/srv/net/tl/tcp/tcp \ 127 $(USPACEDIR)/srv/net/tl/icmp/icmp 128 129 CFG += $(NET_CFG) 130 endif 131 endif 132 -
boot/arch/amd64/Makefile.inc
-
Property mode
changed from
100644
to100755
rf516bc2 rc2efbb4 39 39 build: $(BASE)/image.iso 40 40 41 $(BASE)/image.iso: arch/$(BARCH)/grub/stage2_eltorito $(KERNELDIR)/kernel.bin $(INIT_TASKS) $(RD_SRVS) $(RD_APPS) 41 $(BASE)/image.iso: arch/$(BARCH)/grub/stage2_eltorito $(KERNELDIR)/kernel.bin $(INIT_TASKS) $(RD_SRVS) $(RD_APPS) $(CFG) 42 42 mkdir -p $(TMP)/boot/grub 43 43 cp arch/$(BARCH)/grub/stage2_eltorito $(TMP)/boot/grub/ … … 56 56 done 57 57 58 rm -f $(USPACEDIR)/dist/srv/* 59 rm -f $(USPACEDIR)/dist/app/* 60 rm -f $(USPACEDIR)/dist/cfg/net/* 61 58 62 cp $(KERNELDIR)/kernel.bin $(TMP)/boot/ 59 63 for task in $(INIT_TASKS) ; do \ … … 65 69 for file in $(RD_APPS) ; do \ 66 70 cp $$file $(USPACEDIR)/dist/app/ ; \ 71 done 72 for file in $(NET_CFG) ; do \ 73 cp $$file $(USPACEDIR)/dist/cfg/net/ ; \ 67 74 done 68 75 … … 78 85 79 86 clean: 87 rm -f $(USPACEDIR)/dist/srv/* 88 rm -f $(USPACEDIR)/dist/app/* 89 rm -f $(USPACEDIR)/dist/cfg/net/* 90 80 91 for file in $(RD_SRVS) ; do \ 81 92 rm -f $(USPACEDIR)/dist/srv/`basename $$file` ; \ … … 84 95 rm -f $(USPACEDIR)/dist/app/`basename $$file` ; \ 85 96 done 97 for file in $(NET_CFG) ; do \ 98 rm -f $(USPACEDIR)/dist/cfg/net/`basename $$file` ; \ 99 done 86 100 rm -fr $(TMP) 87 101 rm -f $(BASE)/image.iso -
Property mode
changed from
-
boot/arch/arm32/loader/Makefile
rf516bc2 rc2efbb4 37 37 38 38 clean: 39 rm -f $(USPACEDIR)/dist/srv/* 40 rm -f $(USPACEDIR)/dist/app/* 41 rm -f $(USPACEDIR)/dist/cfg/net/* 42 39 43 for file in $(RD_SRVS) ; do \ 40 44 rm -f $(USPACEDIR)/dist/srv/`basename $$file` ; \ … … 43 47 rm -f $(USPACEDIR)/dist/app/`basename $$file` ; \ 44 48 done 49 for file in $(NET_CFG) ; do \ 50 rm -f $(USPACEDIR)/dist/cfg/net/`basename $$file` ; \ 51 done 45 52 rm -f $(DEPEND) $(DEPEND_PREV) $(JOB) $(OUTPUT) $(COMPS).h $(COMPS).c $(LINK) $(INITRD).img $(INITRD).fs 46 53 find . -name '*.o' -follow -exec rm \{\} \; -
boot/arch/arm32/loader/Makefile.build
rf516bc2 rc2efbb4 76 76 77 77 $(DEPEND): 78 rm -f $(USPACEDIR)/dist/srv/* 79 rm -f $(USPACEDIR)/dist/app/* 80 rm -f $(USPACEDIR)/dist/cfg/net/* 81 78 82 for file in $(RD_SRVS) ; do \ 79 83 cp $$file $(USPACEDIR)/dist/srv/ ; \ … … 81 85 for file in $(RD_APPS) ; do \ 82 86 cp $$file $(USPACEDIR)/dist/app/ ; \ 87 done 88 for file in $(NET_CFG) ; do \ 89 cp $$file $(USPACEDIR)/dist/cfg/net/ ; \ 83 90 done 84 91 ifeq ($(RDFMT),tmpfs) -
boot/arch/ia64/loader/Makefile
rf516bc2 rc2efbb4 40 40 $(MAKE) -C gefi clean 41 41 $(MAKE) -C gefi/HelenOS clean 42 43 rm -f $(USPACEDIR)/dist/srv/* 44 rm -f $(USPACEDIR)/dist/app/* 45 rm -f $(USPACEDIR)/dist/cfg/net/* 46 42 47 for file in $(RD_SRVS) ; do \ 43 48 rm -f $(USPACEDIR)/dist/srv/`basename $$file` ; \ … … 46 51 rm -f $(USPACEDIR)/dist/app/`basename $$file` ; \ 47 52 done 53 for file in $(NET_CFG) ; do \ 54 rm -f $(USPACEDIR)/dist/cfg/net/`basename $$file` ; \ 55 done 48 56 rm -f $(DEPEND) $(DEPEND_PREV) $(JOB) $(OUTPUT) $(HELLO) $(COMPS).h $(COMPS).c $(LINK) $(INITRD).img $(INITRD).fs 49 57 find . -name '*.o' -follow -exec rm \{\} \; -
boot/arch/ia64/loader/Makefile.build
rf516bc2 rc2efbb4 77 77 78 78 $(DEPEND): 79 rm -f $(USPACEDIR)/dist/srv/* 80 rm -f $(USPACEDIR)/dist/app/* 81 rm -f $(USPACEDIR)/dist/cfg/net/* 82 79 83 for file in $(RD_SRVS) ; do \ 80 84 cp $$file $(USPACEDIR)/dist/srv/ ; \ … … 82 86 for file in $(RD_APPS) ; do \ 83 87 cp $$file $(USPACEDIR)/dist/app/ ; \ 88 done 89 for file in $(NET_CFG) ; do \ 90 cp $$file $(USPACEDIR)/dist/cfg/net/ ; \ 84 91 done 85 92 ifeq ($(RDFMT),tmpfs) -
boot/arch/mips32/loader/Makefile
rf516bc2 rc2efbb4 37 37 38 38 clean: 39 rm -f $(USPACEDIR)/dist/srv/* 40 rm -f $(USPACEDIR)/dist/app/* 41 rm -f $(USPACEDIR)/dist/cfg/net/* 42 39 43 for file in $(RD_SRVS) ; do \ 40 44 rm -f $(USPACEDIR)/dist/srv/`basename $$file` ; \ … … 43 47 rm -f $(USPACEDIR)/dist/app/`basename $$file` ; \ 44 48 done 49 for file in $(NET_CFG) ; do \ 50 rm -f $(USPACEDIR)/dist/cfg/net/`basename $$file` ; \ 51 done 45 52 rm -f $(DEPEND) $(DEPEND_PREV) $(JOB) $(OUTPUT) $(RAW) $(COMPS).h $(COMPS).c $(LINK) $(INITRD).img $(INITRD).fs 46 53 find . -name '*.o' -follow -exec rm \{\} \; -
boot/arch/mips32/loader/Makefile.build
rf516bc2 rc2efbb4 77 77 78 78 $(DEPEND): 79 rm -f $(USPACEDIR)/dist/srv/* 80 rm -f $(USPACEDIR)/dist/app/* 81 rm -f $(USPACEDIR)/dist/cfg/net/* 82 79 83 for file in $(RD_SRVS) ; do \ 80 84 cp $$file $(USPACEDIR)/dist/srv/ ; \ … … 82 86 for file in $(RD_APPS) ; do \ 83 87 cp $$file $(USPACEDIR)/dist/app/ ; \ 88 done 89 for file in $(NET_CFG) ; do \ 90 cp $$file $(USPACEDIR)/dist/cfg/net/ ; \ 84 91 done 85 92 ifeq ($(RDFMT),tmpfs) -
boot/arch/ppc32/loader/Makefile
rf516bc2 rc2efbb4 37 37 38 38 clean: 39 rm -f $(USPACEDIR)/dist/srv/* 40 rm -f $(USPACEDIR)/dist/app/* 41 rm -f $(USPACEDIR)/dist/cfg/net/* 42 39 43 for file in $(RD_SRVS) ; do \ 40 44 rm -f $(USPACEDIR)/dist/srv/`basename $$file` ; \ … … 43 47 rm -f $(USPACEDIR)/dist/app/`basename $$file` ; \ 44 48 done 49 for file in $(NET_CFG) ; do \ 50 rm -f $(USPACEDIR)/dist/cfg/net/`basename $$file` ; \ 51 done 45 52 rm -f $(DEPEND) $(DEPEND_PREV) $(JOB) $(OUTPUT) $(COMPS).h $(COMPS).c $(LINK) $(INITRD).img $(INITRD).fs 46 53 find . -name '*.o' -follow -exec rm \{\} \; -
boot/arch/ppc32/loader/Makefile.build
rf516bc2 rc2efbb4 77 77 78 78 $(DEPEND): 79 rm -f $(USPACEDIR)/dist/srv/* 80 rm -f $(USPACEDIR)/dist/app/* 81 rm -f $(USPACEDIR)/dist/cfg/net/* 82 79 83 for file in $(RD_SRVS) ; do \ 80 84 cp $$file $(USPACEDIR)/dist/srv/ ; \ … … 82 86 for file in $(RD_APPS) ; do \ 83 87 cp $$file $(USPACEDIR)/dist/app/ ; \ 88 done 89 for file in $(NET_CFG) ; do \ 90 cp $$file $(USPACEDIR)/dist/cfg/net/ ; \ 84 91 done 85 92 ifeq ($(RDFMT),tmpfs) -
boot/arch/sparc64/loader/Makefile
rf516bc2 rc2efbb4 37 37 38 38 clean: 39 rm -f $(USPACEDIR)/dist/srv/* 40 rm -f $(USPACEDIR)/dist/app/* 41 rm -f $(USPACEDIR)/dist/cfg/net/* 42 39 43 for file in $(RD_SRVS) $(RD_SRVS_GENERIC) ; do \ 40 44 rm -f $(USPACEDIR)/dist/srv/`basename $$file` ; \ … … 43 47 rm -f $(USPACEDIR)/dist/app/`basename $$file` ; \ 44 48 done 49 for file in $(NET_CFG) ; do \ 50 rm -f $(USPACEDIR)/dist/cfg/net/`basename $$file` ; \ 51 done 45 52 rm -f $(DEPEND) $(DEPEND_PREV) $(JOB) $(OUTPUT) $(COMPS).h $(COMPS).c $(LINK) $(INITRD).img $(INITRD).fs 46 53 find . -name '*.o' -follow -exec rm \{\} \; -
boot/arch/sparc64/loader/Makefile.build
rf516bc2 rc2efbb4 88 88 89 89 $(DEPEND): 90 rm -f $(USPACEDIR)/dist/srv/* 91 rm -f $(USPACEDIR)/dist/app/* 92 rm -f $(USPACEDIR)/dist/cfg/net/* 93 90 94 for file in $(RD_SRVS) ; do \ 91 95 cp $$file $(USPACEDIR)/dist/srv/ ; \ … … 93 97 for file in $(RD_APPS) ; do \ 94 98 cp $$file $(USPACEDIR)/dist/app/ ; \ 99 done 100 for file in $(NET_CFG) ; do \ 101 cp $$file $(USPACEDIR)/dist/cfg/net/ ; \ 95 102 done 96 103 ifeq ($(RDFMT),tmpfs) -
defaults/amd64/Makefile.config
rf516bc2 rc2efbb4 61 61 # Mount /data on startup 62 62 CONFIG_MOUNT_DATA = n 63 64 # Default networking architecture 65 NETWORKING = modular -
defaults/arm32/Makefile.config
rf516bc2 rc2efbb4 37 37 # Mount /data on startup 38 38 CONFIG_MOUNT_DATA = n 39 40 # Default networking architecture 41 NETWORKING = none -
defaults/ia32/Makefile.config
rf516bc2 rc2efbb4 67 67 # Mount /data on startup 68 68 CONFIG_MOUNT_DATA = n 69 70 # Default networking architecture 71 NETWORKING = modular -
defaults/ia64/Makefile.config
rf516bc2 rc2efbb4 49 49 # Mount /data on startup 50 50 CONFIG_MOUNT_DATA = n 51 52 # Default networking architecture 53 NETWORKING = modular -
defaults/mips32/Makefile.config
rf516bc2 rc2efbb4 43 43 # Mount /data on startup 44 44 CONFIG_MOUNT_DATA = n 45 46 # Default networking architecture 47 NETWORKING = none -
defaults/ppc32/Makefile.config
rf516bc2 rc2efbb4 43 43 # Mount /data on startup 44 44 CONFIG_MOUNT_DATA = n 45 46 # Default networking architecture 47 NETWORKING = none -
defaults/sparc64/Makefile.config
rf516bc2 rc2efbb4 61 61 # Mount /data on startup 62 62 CONFIG_MOUNT_DATA = n 63 64 # Default networking architecture 65 NETWORKING = modular -
defaults/sparc64/sun4v/Makefile.config
rf516bc2 rc2efbb4 12 12 13 13 CONFIG_FB = n 14 15 NETWORKING = none 16 -
defaults/special/Makefile.config
rf516bc2 rc2efbb4 3 3 4 4 # Compiler 5 COMPILER = gcc_ native5 COMPILER = gcc_cross 6 6 7 7 # Support for SMP -
defaults/special/abs32le/Makefile.config
rf516bc2 rc2efbb4 1 1 # Platform 2 2 PLATFORM = abs32le 3 4 # Cross-compiler target 5 CROSS_TARGET = ia32 6 7 # Networking architecture 8 NETWORKING = none -
kernel/Makefile.build
rf516bc2 rc2efbb4 115 115 OBJCOPY = $(BINUTILS_PREFIX)objcopy 116 116 OBJDUMP = $(BINUTILS_PREFIX)objdump 117 LIBDIR = /usr/lib118 117 CFLAGS = $(GCC_CFLAGS) 119 118 DEPEND_DEFS = $(DEFS) $(CONFIG_DEFS) … … 127 126 OBJCOPY = $(TOOLCHAIN_DIR)/bin/$(TARGET)-objcopy 128 127 OBJDUMP = $(TOOLCHAIN_DIR)/bin/$(TARGET)-objdump 129 LIBDIR = $(TOOLCHAIN_DIR)/lib130 128 CFLAGS = $(GCC_CFLAGS) 131 129 DEPEND_DEFS = $(DEFS) $(CONFIG_DEFS) … … 139 137 OBJCOPY = objcopy 140 138 OBJDUMP = objdump 141 LIBDIR = /usr/lib142 139 CFLAGS = $(ICC_CFLAGS) 143 140 DEPEND_DEFS = $(DEFS) $(CONFIG_DEFS) … … 151 148 OBJCOPY = $(BINUTILS_PREFIX)objcopy 152 149 OBJDUMP = $(BINUTILS_PREFIX)objdump 153 LIBDIR = /usr/lib154 150 CFLAGS = $(SUNCC_CFLAGS) 155 151 DEFS += $(CONFIG_DEFS) … … 164 160 OBJCOPY = $(BINUTILS_PREFIX)objcopy 165 161 OBJDUMP = $(BINUTILS_PREFIX)objdump 166 LIBDIR = /usr/lib167 162 CFLAGS = $(CLANG_CFLAGS) 168 163 DEPEND_DEFS = $(DEFS) $(CONFIG_DEFS) -
kernel/arch/abs32le/Makefile.inc
rf516bc2 rc2efbb4 30 30 # 31 31 32 BFD = binary 33 34 ifeq ($(COMPILER),gcc_cross) 35 TOOLCHAIN_DIR = $(CROSS_PREFIX)/$(CROSS_TARGET) 36 37 ifeq ($(CROSS_TARGET),arm32) 38 TARGET = arm-linux-gnu 39 ATSIGN = % 40 endif 41 42 ifeq ($(CROSS_TARGET),ia32) 43 TARGET = i686-pc-linux-gnu 44 endif 45 46 ifeq ($(CROSS_TARGET),mips32) 47 TARGET = mipsel-linux-gnu 48 GCC_CFLAGS += -mno-abicalls 49 endif 50 endif 51 32 52 BITS = 32 33 53 ENDIANESS = LE … … 43 63 arch/$(KARCH)/src/ddi/ddi.c \ 44 64 arch/$(KARCH)/src/smp/smp.c \ 65 arch/$(KARCH)/src/smp/ipi.c \ 45 66 arch/$(KARCH)/src/mm/as.c \ 46 67 arch/$(KARCH)/src/mm/frame.c \ -
kernel/arch/abs32le/include/asm.h
rf516bc2 rc2efbb4 40 40 #include <config.h> 41 41 42 extern void interrupt_handlers(void); 43 44 extern void enable_l_apic_in_msr(void); 45 46 47 extern void asm_delay_loop(uint32_t); 48 extern void asm_fake_loop(uint32_t); 49 42 static inline void asm_delay_loop(uint32_t usec) 43 { 44 } 50 45 51 46 static inline __attribute__((noreturn)) void cpu_halt(void) -
kernel/arch/abs32le/include/atomic.h
rf516bc2 rc2efbb4 54 54 } 55 55 56 static inline longatomic_postinc(atomic_t *val)56 static inline atomic_count_t atomic_postinc(atomic_t *val) 57 57 { 58 58 /* On real hardware both the storing of the previous … … 60 60 atomic action. */ 61 61 62 longprev = val->count;62 atomic_count_t prev = val->count; 63 63 64 64 val->count++; … … 66 66 } 67 67 68 static inline longatomic_postdec(atomic_t *val)68 static inline atomic_count_t atomic_postdec(atomic_t *val) 69 69 { 70 70 /* On real hardware both the storing of the previous … … 72 72 atomic action. */ 73 73 74 longprev = val->count;74 atomic_count_t prev = val->count; 75 75 76 76 val->count--; … … 81 81 #define atomic_predec(val) (atomic_postdec(val) - 1) 82 82 83 static inline uint32_t test_and_set(atomic_t *val) { 84 uint32_t v; 85 86 asm volatile ( 87 "movl $1, %[v]\n" 88 "xchgl %[v], %[count]\n" 89 : [v] "=r" (v), [count] "+m" (val->count) 90 ); 91 92 return v; 83 static inline atomic_count_t test_and_set(atomic_t *val) 84 { 85 atomic_count_t prev = val->count; 86 val->count = 1; 87 return prev; 93 88 } 94 89 95 /** ia32 specific fast spinlock */96 90 static inline void atomic_lock_arch(atomic_t *val) 97 91 { 98 uint32_t tmp; 99 100 preemption_disable(); 101 asm volatile ( 102 "0:\n" 103 "pause\n" /* Pentium 4's HT love this instruction */ 104 "mov %[count], %[tmp]\n" 105 "testl %[tmp], %[tmp]\n" 106 "jnz 0b\n" /* lightweight looping on locked spinlock */ 107 108 "incl %[tmp]\n" /* now use the atomic operation */ 109 "xchgl %[count], %[tmp]\n" 110 "testl %[tmp], %[tmp]\n" 111 "jnz 0b\n" 112 : [count] "+m" (val->count), [tmp] "=&r" (tmp) 113 ); 114 /* 115 * Prevent critical section code from bleeding out this way up. 116 */ 117 CS_ENTER_BARRIER(); 92 do { 93 while (val->count); 94 } while (test_and_set(val)); 118 95 } 119 96 -
kernel/arch/abs32le/include/barrier.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup ia3229 /** @addtogroup abs32le 30 30 * @{ 31 31 */ … … 33 33 */ 34 34 35 #ifndef KERN_ia32_BARRIER_H_ 36 #define KERN_ia32_BARRIER_H_ 37 38 /* 39 * NOTE: 40 * No barriers for critical section (i.e. spinlock) on IA-32 are needed: 41 * - spinlock_lock() and spinlock_trylock() use serializing XCHG instruction 42 * - writes cannot pass reads on IA-32 => spinlock_unlock() needs no barriers 43 */ 35 #ifndef KERN_abs32le_BARRIER_H_ 36 #define KERN_abs32le_BARRIER_H_ 44 37 45 38 /* … … 47 40 */ 48 41 49 #define CS_ENTER_BARRIER() asm volatile ("" ::: "memory")50 #define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory")42 #define CS_ENTER_BARRIER() 43 #define CS_LEAVE_BARRIER() 51 44 52 static inline void cpuid_serialization(void) 53 { 54 asm volatile ( 55 "xorl %%eax, %%eax\n" 56 "cpuid\n" 57 ::: "eax", "ebx", "ecx", "edx", "memory" 58 ); 59 } 45 #define memory_barrier() 46 #define read_barrier() 47 #define write_barrier() 60 48 61 #if defined(CONFIG_FENCES_P4) 62 #define memory_barrier() asm volatile ("mfence\n" ::: "memory") 63 #define read_barrier() asm volatile ("lfence\n" ::: "memory") 64 #ifdef CONFIG_WEAK_MEMORY 65 #define write_barrier() asm volatile ("sfence\n" ::: "memory") 66 #else 67 #define write_barrier() asm volatile ("" ::: "memory"); 68 #endif 69 #elif defined(CONFIG_FENCES_P3) 70 #define memory_barrier() cpuid_serialization() 71 #define read_barrier() cpuid_serialization() 72 #ifdef CONFIG_WEAK_MEMORY 73 #define write_barrier() asm volatile ("sfence\n" ::: "memory") 74 #else 75 #define write_barrier() asm volatile ("" ::: "memory"); 76 #endif 77 #else 78 #define memory_barrier() cpuid_serialization() 79 #define read_barrier() cpuid_serialization() 80 #ifdef CONFIG_WEAK_MEMORY 81 #define write_barrier() cpuid_serialization() 82 #else 83 #define write_barrier() asm volatile ("" ::: "memory"); 84 #endif 85 #endif 86 87 /* 88 * On ia32, the hardware takes care about instruction and data cache coherence, 89 * even on SMP systems. We issue a write barrier to be sure that writes 90 * queueing in the store buffer drain to the memory (even though it would be 91 * sufficient for them to drain to the D-cache). 92 */ 93 #define smc_coherence(a) write_barrier() 94 #define smc_coherence_block(a, l) write_barrier() 49 #define smc_coherence(addr) 50 #define smc_coherence_block(addr, size) 95 51 96 52 #endif -
kernel/arch/abs32le/include/context.h
rf516bc2 rc2efbb4 40 40 41 41 #define context_set(ctx, pc, stack, size) \ 42 42 context_set_generic(ctx, pc, stack, size) 43 43 44 44 /* -
kernel/arch/abs32le/include/context_offset.h
rf516bc2 rc2efbb4 37 37 38 38 #define OFFSET_PC 0x00 39 40 #ifdef KERNEL 41 #define OFFSET_IPL 0x04 42 #else 43 #define OFFSET_TLS 0x04 44 #endif 39 #define OFFSET_IPL 0x04 45 40 46 41 #endif -
kernel/arch/abs32le/include/memstr.h
rf516bc2 rc2efbb4 36 36 #define KERN_abs32le_MEMSTR_H_ 37 37 38 #define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt)) 39 40 extern void memsetw(void *, size_t, uint16_t); 41 extern void memsetb(void *, size_t, uint8_t); 42 43 extern int memcmp(const void *, const void *, size_t); 38 #define memcpy(dst, src, cnt) _memcpy((dst), (src), (cnt)) 39 #define memsetb(dst, cnt, val) _memsetb((dst), (cnt), (val)) 40 #define memsetw(dst, cnt, val) _memsetw((dst), (cnt), (val)) 44 41 45 42 #endif -
kernel/arch/abs32le/include/mm/frame.h
rf516bc2 rc2efbb4 40 40 41 41 #ifdef KERNEL 42 #ifndef __ASM__43 42 44 43 #include <arch/types.h> … … 47 46 extern void physmem_print(void); 48 47 49 #endif /* __ASM__ */50 48 #endif /* KERNEL */ 51 49 -
kernel/arch/abs32le/include/mm/page.h
rf516bc2 rc2efbb4 43 43 #ifdef KERNEL 44 44 45 #ifndef __ASM__ 46 #define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) 47 #define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) 48 #else 49 #define KA2PA(x) ((x) - 0x80000000) 50 #define PA2KA(x) ((x) + 0x80000000) 51 #endif 45 #define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) 46 #define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) 52 47 53 48 /* … … 122 117 #define PTE_EXECUTABLE_ARCH(p) 1 123 118 124 #ifndef __ASM__125 126 119 #include <mm/mm.h> 127 120 #include <arch/interrupt.h> … … 129 122 #include <typedefs.h> 130 123 131 /* Page fault error codes. */132 133 /** When bit on this position is 0, the page fault was caused by a not-present134 * page.135 */136 #define PFERR_CODE_P (1 << 0)137 138 /** When bit on this position is 1, the page fault was caused by a write. */139 #define PFERR_CODE_RW (1 << 1)140 141 /** When bit on this position is 1, the page fault was caused in user mode. */142 #define PFERR_CODE_US (1 << 2)143 144 /** When bit on this position is 1, a reserved bit was set in page directory. */145 #define PFERR_CODE_RSVD (1 << 3)146 147 124 /** Page Table Entry. */ 148 125 typedef struct { 149 unsigned present : 1; 150 unsigned writeable : 1; 151 unsigned uaccessible : 1; 152 unsigned page_write_through : 1; 153 unsigned page_cache_disable : 1; 154 unsigned accessed : 1; 155 unsigned dirty : 1; 156 unsigned pat : 1; 157 unsigned global : 1; 158 unsigned soft_valid : 1; /**< Valid content even if the present bit is not set. */ 159 unsigned avl : 2; 160 unsigned frame_address : 20; 161 } __attribute__ ((packed)) pte_t; 126 unsigned int present : 1; 127 unsigned int writeable : 1; 128 unsigned int uaccessible : 1; 129 unsigned int page_write_through : 1; 130 unsigned int page_cache_disable : 1; 131 unsigned int accessed : 1; 132 unsigned int dirty : 1; 133 unsigned int pat : 1; 134 unsigned int global : 1; 135 136 /** Valid content even if the present bit is not set. */ 137 unsigned int soft_valid : 1; 138 unsigned int avl : 2; 139 unsigned int frame_address : 20; 140 } __attribute__((packed)) pte_t; 162 141 163 142 static inline unsigned int get_pt_flags(pte_t *pt, size_t i) … … 192 171 193 172 extern void page_arch_init(void); 194 extern void page_fault(int n, istate_t *istate); 195 196 #endif /* __ASM__ */ 173 extern void page_fault(int, istate_t *); 197 174 198 175 #endif /* KERNEL */ -
kernel/arch/abs32le/include/types.h
rf516bc2 rc2efbb4 55 55 typedef uint32_t unative_t; 56 56 typedef int32_t native_t; 57 typedef uint32_t atomic_count_t; 57 58 58 59 typedef struct { -
kernel/arch/abs32le/src/abs32le.c
rf516bc2 rc2efbb4 35 35 #include <arch.h> 36 36 #include <arch/types.h> 37 #include <arch/context.h>38 37 #include <arch/interrupt.h> 39 38 #include <arch/asm.h> … … 41 40 #include <func.h> 42 41 #include <config.h> 42 #include <errno.h> 43 43 #include <context.h> 44 #include <fpu_context.h> 44 45 #include <interrupt.h> 46 #include <syscall/copy.h> 45 47 #include <ddi/irq.h> 46 48 #include <proc/thread.h> … … 49 51 #include <sysinfo/sysinfo.h> 50 52 #include <memstr.h> 53 54 char memcpy_from_uspace_failover_address; 55 char memcpy_to_uspace_failover_address; 51 56 52 57 void arch_pre_mm_init(void) … … 83 88 unative_t sys_tls_set(unative_t addr) 84 89 { 85 return 0;90 return EOK; 86 91 } 87 92 … … 109 114 } 110 115 111 void memsetb(void *dst, size_t cnt, uint8_t val)112 {113 _memsetb(dst, cnt, val);114 }115 116 void memsetw(void *dst, size_t cnt, uint16_t val)117 {118 _memsetw(dst, cnt, val);119 }120 121 116 void panic_printf(char *fmt, ...) 122 117 { … … 140 135 } 141 136 137 void fpu_init(void) 138 { 139 } 140 141 void fpu_context_save(fpu_context_t *ctx) 142 { 143 } 144 145 void fpu_context_restore(fpu_context_t *ctx) 146 { 147 } 148 149 int memcpy_from_uspace(void *dst, const void *uspace_src, size_t size) 150 { 151 return EOK; 152 } 153 154 int memcpy_to_uspace(void *uspace_dst, const void *src, size_t size) 155 { 156 return EOK; 157 } 158 142 159 /** @} 143 160 */ -
kernel/arch/abs32le/src/debug/stacktrace.c
rf516bc2 rc2efbb4 40 40 bool kernel_frame_pointer_validate(uintptr_t fp) 41 41 { 42 return true; ;42 return true; 43 43 } 44 44 -
kernel/arch/amd64/include/atomic.h
rf516bc2 rc2efbb4 40 40 #include <preemption.h> 41 41 42 static inline void atomic_inc(atomic_t *val) { 42 static inline void atomic_inc(atomic_t *val) 43 { 43 44 #ifdef CONFIG_SMP 44 45 asm volatile ( … … 54 55 } 55 56 56 static inline void atomic_dec(atomic_t *val) { 57 static inline void atomic_dec(atomic_t *val) 58 { 57 59 #ifdef CONFIG_SMP 58 60 asm volatile ( … … 68 70 } 69 71 70 static inline long atomic_postinc(atomic_t *val)72 static inline atomic_count_t atomic_postinc(atomic_t *val) 71 73 { 72 longr = 1;74 atomic_count_t r = 1; 73 75 74 76 asm volatile ( 75 77 "lock xaddq %[r], %[count]\n" 76 : [count] "+m" (val->count), [r] "+r" (r) 78 : [count] "+m" (val->count), 79 [r] "+r" (r) 77 80 ); 78 81 … … 80 83 } 81 84 82 static inline long atomic_postdec(atomic_t *val)85 static inline atomic_count_t atomic_postdec(atomic_t *val) 83 86 { 84 longr = -1;87 atomic_count_t r = -1; 85 88 86 89 asm volatile ( 87 90 "lock xaddq %[r], %[count]\n" 88 : [count] "+m" (val->count), [r] "+r" (r) 91 : [count] "+m" (val->count), 92 [r] "+r" (r) 89 93 ); 90 94 … … 95 99 #define atomic_predec(val) (atomic_postdec(val) - 1) 96 100 97 static inline uint64_t test_and_set(atomic_t *val) { 98 uint64_t v; 101 static inline atomic_count_t test_and_set(atomic_t *val) 102 { 103 atomic_count_t v; 99 104 100 105 asm volatile ( 101 106 "movq $1, %[v]\n" 102 107 "xchgq %[v], %[count]\n" 103 : [v] "=r" (v), [count] "+m" (val->count) 108 : [v] "=r" (v), 109 [count] "+m" (val->count) 104 110 ); 105 111 … … 107 113 } 108 114 109 110 115 /** amd64 specific fast spinlock */ 111 116 static inline void atomic_lock_arch(atomic_t *val) 112 117 { 113 uint64_t tmp;118 atomic_count_t tmp; 114 119 115 120 preemption_disable(); … … 125 130 "testq %[tmp], %[tmp]\n" 126 131 "jnz 0b\n" 127 : [count] "+m" (val->count), [tmp] "=&r" (tmp) 132 : [count] "+m" (val->count), 133 [tmp] "=&r" (tmp) 128 134 ); 135 129 136 /* 130 137 * Prevent critical section code from bleeding out this way up. -
kernel/arch/amd64/include/interrupt.h
rf516bc2 rc2efbb4 54 54 #define IRQ_PIC_SPUR 7 55 55 #define IRQ_MOUSE 12 56 #define IRQ_DP8390 9 56 57 57 58 /* this one must have four least significant bits set to ones */ -
kernel/arch/amd64/include/memstr.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup amd64 29 /** @addtogroup amd64 30 30 * @{ 31 31 */ … … 38 38 #define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt)) 39 39 40 extern void memsetw(void *dst, size_t cnt, uint16_t x); 41 extern void memsetb(void *dst, size_t cnt, uint8_t x); 42 43 extern int memcmp(const void *a, const void *b, size_t cnt); 40 extern void memsetw(void *, size_t, uint16_t); 41 extern void memsetb(void *, size_t, uint8_t); 44 42 45 43 #endif -
kernel/arch/amd64/include/types.h
rf516bc2 rc2efbb4 55 55 typedef uint64_t unative_t; 56 56 typedef int64_t native_t; 57 typedef uint64_t atomic_count_t; 57 58 58 59 typedef struct { -
kernel/arch/amd64/src/amd64.c
rf516bc2 rc2efbb4 228 228 (uintptr_t) I8042_BASE); 229 229 #endif 230 231 #ifdef CONFIG_NETIF_DP8390 232 trap_virtual_enable_irqs(1 << IRQ_DP8390); 233 sysinfo_set_item_val("netif.dp8390.inr", NULL, IRQ_DP8390); 234 #endif 230 235 } 231 236 -
kernel/arch/amd64/src/debugger.c
rf516bc2 rc2efbb4 201 201 202 202 /* Send IPI */ 203 #ifdef CONFIG_SMP204 203 // ipi_broadcast(VECTOR_DEBUG_IPI); 205 #endif206 204 207 205 return curidx; … … 262 260 spinlock_unlock(&bkpoint_lock); 263 261 interrupts_restore(ipl); 264 #ifdef CONFIG_SMP 265 // ipi_broadcast(VECTOR_DEBUG_IPI); 266 #endif 262 // ipi_broadcast(VECTOR_DEBUG_IPI); 267 263 } 268 264 -
kernel/arch/arm32/include/atomic.h
rf516bc2 rc2efbb4 47 47 * 48 48 */ 49 static inline long atomic_add(atomic_t *val, int i)49 static inline atomic_count_t atomic_add(atomic_t *val, atomic_count_t i) 50 50 { 51 long ret;52 53 51 /* 54 52 * This implementation is for UP pre-ARMv6 systems where we do not have … … 57 55 ipl_t ipl = interrupts_disable(); 58 56 val->count += i; 59 ret = val->count;57 atomic_count_t ret = val->count; 60 58 interrupts_restore(ipl); 61 59 … … 66 64 * 67 65 * @param val Variable to be incremented. 66 * 68 67 */ 69 68 static inline void atomic_inc(atomic_t *val) … … 75 74 * 76 75 * @param val Variable to be decremented. 76 * 77 77 */ 78 78 static inline void atomic_dec(atomic_t *val) { … … 84 84 * @param val Variable to be incremented. 85 85 * @return Value after incrementation. 86 * 86 87 */ 87 static inline longatomic_preinc(atomic_t *val)88 static inline atomic_count_t atomic_preinc(atomic_t *val) 88 89 { 89 90 return atomic_add(val, 1); … … 94 95 * @param val Variable to be decremented. 95 96 * @return Value after decrementation. 97 * 96 98 */ 97 static inline longatomic_predec(atomic_t *val)99 static inline atomic_count_t atomic_predec(atomic_t *val) 98 100 { 99 101 return atomic_add(val, -1); … … 104 106 * @param val Variable to be incremented. 105 107 * @return Value before incrementation. 108 * 106 109 */ 107 static inline longatomic_postinc(atomic_t *val)110 static inline atomic_count_t atomic_postinc(atomic_t *val) 108 111 { 109 112 return atomic_add(val, 1) - 1; … … 114 117 * @param val Variable to be decremented. 115 118 * @return Value before decrementation. 119 * 116 120 */ 117 static inline longatomic_postdec(atomic_t *val)121 static inline atomic_count_t atomic_postdec(atomic_t *val) 118 122 { 119 123 return atomic_add(val, -1) + 1; -
kernel/arch/arm32/include/memstr.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup arm32 29 /** @addtogroup arm32 30 30 * @{ 31 31 */ … … 39 39 #define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt)) 40 40 41 extern void memsetw(void *dst, size_t cnt, uint16_t x); 42 extern void memsetb(void *dst, size_t cnt, uint8_t x); 43 44 extern int memcmp(const void *a, const void *b, size_t cnt); 41 extern void memsetw(void *, size_t, uint16_t); 42 extern void memsetb(void *, size_t, uint8_t); 45 43 46 44 #endif -
kernel/arch/arm32/include/types.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup arm32 29 /** @addtogroup arm32 30 30 * @{ 31 31 */ … … 38 38 39 39 #ifndef DOXYGEN 40 # define ATTRIBUTE_PACKED __attribute__((packed))40 #define ATTRIBUTE_PACKED __attribute__((packed)) 41 41 #else 42 #define ATTRIBUTE_PACKED42 #define ATTRIBUTE_PACKED 43 43 #endif 44 44 … … 62 62 typedef uint32_t unative_t; 63 63 typedef int32_t native_t; 64 typedef uint32_t atomic_count_t; 64 65 65 66 typedef struct { -
kernel/arch/ia32/include/atomic.h
rf516bc2 rc2efbb4 40 40 #include <preemption.h> 41 41 42 static inline void atomic_inc(atomic_t *val) { 42 static inline void atomic_inc(atomic_t *val) 43 { 43 44 #ifdef CONFIG_SMP 44 45 asm volatile ( … … 54 55 } 55 56 56 static inline void atomic_dec(atomic_t *val) { 57 static inline void atomic_dec(atomic_t *val) 58 { 57 59 #ifdef CONFIG_SMP 58 60 asm volatile ( … … 68 70 } 69 71 70 static inline long atomic_postinc(atomic_t *val)72 static inline atomic_count_t atomic_postinc(atomic_t *val) 71 73 { 72 longr = 1;74 atomic_count_t r = 1; 73 75 74 76 asm volatile ( 75 77 "lock xaddl %[r], %[count]\n" 76 : [count] "+m" (val->count), [r] "+r" (r) 78 : [count] "+m" (val->count), 79 [r] "+r" (r) 77 80 ); 78 81 … … 80 83 } 81 84 82 static inline long atomic_postdec(atomic_t *val)85 static inline atomic_count_t atomic_postdec(atomic_t *val) 83 86 { 84 longr = -1;87 atomic_count_t r = -1; 85 88 86 89 asm volatile ( 87 90 "lock xaddl %[r], %[count]\n" 88 : [count] "+m" (val->count), [r] "+r"(r) 91 : [count] "+m" (val->count), 92 [r] "+r" (r) 89 93 ); 90 94 … … 95 99 #define atomic_predec(val) (atomic_postdec(val) - 1) 96 100 97 static inline uint32_t test_and_set(atomic_t *val) { 98 uint32_t v; 101 static inline atomic_count_t test_and_set(atomic_t *val) 102 { 103 atomic_count_t v; 99 104 100 105 asm volatile ( 101 106 "movl $1, %[v]\n" 102 107 "xchgl %[v], %[count]\n" 103 : [v] "=r" (v), [count] "+m" (val->count) 108 : [v] "=r" (v), 109 [count] "+m" (val->count) 104 110 ); 105 111 … … 110 116 static inline void atomic_lock_arch(atomic_t *val) 111 117 { 112 uint32_t tmp;118 atomic_count_t tmp; 113 119 114 120 preemption_disable(); … … 124 130 "testl %[tmp], %[tmp]\n" 125 131 "jnz 0b\n" 126 : [count] "+m" (val->count), [tmp] "=&r" (tmp) 132 : [count] "+m" (val->count), 133 [tmp] "=&r" (tmp) 127 134 ); 135 128 136 /* 129 137 * Prevent critical section code from bleeding out this way up. -
kernel/arch/ia32/include/interrupt.h
rf516bc2 rc2efbb4 54 54 #define IRQ_PIC_SPUR 7 55 55 #define IRQ_MOUSE 12 56 #define IRQ_DP8390 9 56 57 57 58 /* this one must have four least significant bits set to ones */ -
kernel/arch/ia32/include/memstr.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup ia32 29 /** @addtogroup ia32 30 30 * @{ 31 31 */ … … 38 38 #define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt)) 39 39 40 extern void memsetw(void *dst, size_t cnt, uint16_t x); 41 extern void memsetb(void *dst, size_t cnt, uint8_t x); 42 43 extern int memcmp(const void *a, const void *b, size_t cnt); 40 extern void memsetw(void *, size_t, uint16_t); 41 extern void memsetb(void *, size_t, uint8_t); 44 42 45 43 #endif -
kernel/arch/ia32/include/types.h
rf516bc2 rc2efbb4 55 55 typedef uint32_t unative_t; 56 56 typedef int32_t native_t; 57 typedef uint32_t atomic_count_t; 57 58 58 59 typedef struct { -
kernel/arch/ia32/src/ia32.c
rf516bc2 rc2efbb4 186 186 (uintptr_t) I8042_BASE); 187 187 #endif 188 189 #ifdef CONFIG_NETIF_DP8390 190 trap_virtual_enable_irqs(1 << IRQ_DP8390); 191 sysinfo_set_item_val("netif.dp8390.inr", NULL, IRQ_DP8390); 192 #endif 188 193 } 189 194 -
kernel/arch/ia32/src/smp/ipi.c
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup ia32 29 /** @addtogroup ia32 30 30 * @{ 31 31 */ -
kernel/arch/ia64/include/atomic.h
rf516bc2 rc2efbb4 36 36 #define KERN_ia64_ATOMIC_H_ 37 37 38 static inline uint64_t test_and_set(atomic_t *val)38 static inline atomic_count_t test_and_set(atomic_t *val) 39 39 { 40 uint64_t v;41 40 atomic_count_t v; 41 42 42 asm volatile ( 43 43 "movl %[v] = 0x1;;\n" … … 53 53 { 54 54 do { 55 while (val->count) 56 ; 55 while (val->count); 57 56 } while (test_and_set(val)); 58 57 } … … 60 59 static inline void atomic_inc(atomic_t *val) 61 60 { 62 longv;61 atomic_count_t v; 63 62 64 63 asm volatile ( … … 71 70 static inline void atomic_dec(atomic_t *val) 72 71 { 73 longv;72 atomic_count_t v; 74 73 75 74 asm volatile ( … … 80 79 } 81 80 82 static inline longatomic_preinc(atomic_t *val)81 static inline atomic_count_t atomic_preinc(atomic_t *val) 83 82 { 84 longv;83 atomic_count_t v; 85 84 86 85 asm volatile ( … … 93 92 } 94 93 95 static inline longatomic_predec(atomic_t *val)94 static inline atomic_count_t atomic_predec(atomic_t *val) 96 95 { 97 longv;96 atomic_count_t v; 98 97 99 98 asm volatile ( … … 106 105 } 107 106 108 static inline longatomic_postinc(atomic_t *val)107 static inline atomic_count_t atomic_postinc(atomic_t *val) 109 108 { 110 longv;109 atomic_count_t v; 111 110 112 111 asm volatile ( … … 119 118 } 120 119 121 static inline longatomic_postdec(atomic_t *val)120 static inline atomic_count_t atomic_postdec(atomic_t *val) 122 121 { 123 longv;122 atomic_count_t v; 124 123 125 124 asm volatile ( -
kernel/arch/ia64/include/interrupt.h
rf516bc2 rc2efbb4 61 61 #define IRQ_KBD (0x01 + LEGACY_INTERRUPT_BASE) 62 62 #define IRQ_MOUSE (0x0c + LEGACY_INTERRUPT_BASE) 63 #define IRQ_DP8390 (0x09 + LEGACY_INTERRUPT_BASE) 63 64 64 65 /** General Exception codes. */ -
kernel/arch/ia64/include/memstr.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup ia64 29 /** @addtogroup ia64 30 30 * @{ 31 31 */ … … 38 38 #define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt)) 39 39 40 extern void memsetw(void *dst, size_t cnt, uint16_t x); 41 extern void memsetb(void *dst, size_t cnt, uint8_t x); 42 43 extern int memcmp(const void *a, const void *b, size_t cnt); 40 extern void memsetw(void *, size_t, uint16_t); 41 extern void memsetb(void *, size_t, uint8_t); 44 42 45 43 #endif -
kernel/arch/ia64/include/types.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup ia64 29 /** @addtogroup ia64 30 30 * @{ 31 31 */ … … 63 63 typedef uint64_t unative_t; 64 64 typedef int64_t native_t; 65 typedef uint64_t atomic_count_t; 65 66 66 67 typedef struct { -
kernel/arch/ia64/src/ia64.c
rf516bc2 rc2efbb4 212 212 (uintptr_t) I8042_BASE); 213 213 #endif 214 214 215 #ifdef CONFIG_NETIF_DP8390 216 sysinfo_set_item_val("netif.dp8390.inr", NULL, IRQ_DP8390); 217 #endif 218 215 219 sysinfo_set_item_val("ia64_iospace", NULL, true); 216 220 sysinfo_set_item_val("ia64_iospace.address", NULL, true); -
kernel/arch/mips32/include/atomic.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup mips32 29 /** @addtogroup mips32 30 30 * @{ 31 31 */ … … 51 51 * 52 52 * @return Value after addition. 53 * 53 54 */ 54 static inline long atomic_add(atomic_t *val, int i)55 static inline atomic_count_t atomic_add(atomic_t *val, atomic_count_t i) 55 56 { 56 long tmp, v; 57 atomic_count_t tmp; 58 atomic_count_t v; 57 59 58 60 asm volatile ( … … 64 66 " beq %0, %4, 1b\n" /* if the atomic operation failed, try again */ 65 67 " nop\n" 66 : "=&r" (tmp), "+m" (val->count), "=&r" (v) 67 : "r" (i), "i" (0) 68 : "=&r" (tmp), 69 "+m" (val->count), 70 "=&r" (v) 71 : "r" (i), 72 "i" (0) 68 73 ); 69 74 … … 71 76 } 72 77 73 static inline uint32_t test_and_set(atomic_t *val) { 74 uint32_t tmp, v; 78 static inline atomic_count_t test_and_set(atomic_t *val) 79 { 80 atomic_count_t tmp; 81 atomic_count_t v; 75 82 76 83 asm volatile ( … … 82 89 " beqz %0, 1b\n" 83 90 "2:\n" 84 : "=&r" (tmp), "+m" (val->count), "=&r" (v) 91 : "=&r" (tmp), 92 "+m" (val->count), 93 "=&r" (v) 85 94 : "i" (1) 86 95 ); … … 89 98 } 90 99 91 static inline void atomic_lock_arch(atomic_t *val) { 100 static inline void atomic_lock_arch(atomic_t *val) 101 { 92 102 do { 93 while (val->count) 94 ; 103 while (val->count); 95 104 } while (test_and_set(val)); 96 105 } -
kernel/arch/mips32/include/memstr.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup mips32 29 /** @addtogroup mips32 30 30 * @{ 31 31 */ … … 38 38 #define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt)) 39 39 40 extern void memsetw(void *dst, size_t cnt, uint16_t x); 41 extern void memsetb(void *dst, size_t cnt, uint8_t x); 42 43 extern int memcmp(const void *a, const void *b, size_t cnt); 40 extern void memsetw(void *, size_t, uint16_t); 41 extern void memsetb(void *, size_t, uint8_t); 44 42 45 43 #endif -
kernel/arch/mips32/include/types.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup mips32 29 /** @addtogroup mips32 30 30 * @{ 31 31 */ … … 55 55 typedef uint32_t unative_t; 56 56 typedef int32_t native_t; 57 typedef uint32_t atomic_count_t; 57 58 58 59 typedef struct { -
kernel/arch/mips32/src/smp/dorder.c
rf516bc2 rc2efbb4 33 33 */ 34 34 35 #include <arch/smp/dorder.h> 35 #include <smp/ipi.h> 36 37 #ifdef CONFIG_SMP 36 38 37 39 #define MSIM_DORDER_ADDRESS 0xB0000004 … … 39 41 void ipi_broadcast_arch(int ipi) 40 42 { 41 #ifdef CONFIG_SMP42 43 *((volatile unsigned int *) MSIM_DORDER_ADDRESS) = 0x7FFFFFFF; 44 } 45 43 46 #endif 44 }45 47 46 48 /** @} -
kernel/arch/ppc32/include/atomic.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup ppc32 29 /** @addtogroup ppc32 30 30 * @{ 31 31 */ … … 38 38 static inline void atomic_inc(atomic_t *val) 39 39 { 40 longtmp;41 40 atomic_count_t tmp; 41 42 42 asm volatile ( 43 43 "1:\n" … … 46 46 "stwcx. %0, 0, %2\n" 47 47 "bne- 1b" 48 : "=&r" (tmp), "=m" (val->count) 49 : "r" (&val->count), "m" (val->count) 48 : "=&r" (tmp), 49 "=m" (val->count) 50 : "r" (&val->count), 51 "m" (val->count) 50 52 : "cc" 51 53 ); … … 54 56 static inline void atomic_dec(atomic_t *val) 55 57 { 56 longtmp;57 58 atomic_count_t tmp; 59 58 60 asm volatile ( 59 61 "1:\n" 60 62 "lwarx %0, 0, %2\n" 61 63 "addic %0, %0, -1\n" 62 "stwcx. 64 "stwcx. %0, 0, %2\n" 63 65 "bne- 1b" 64 : "=&r" (tmp), "=m" (val->count) 65 : "r" (&val->count), "m" (val->count) 66 : "=&r" (tmp), 67 "=m" (val->count) 68 : "r" (&val->count), 69 "m" (val->count) 66 70 : "cc" 67 71 ); 68 72 } 69 73 70 static inline longatomic_postinc(atomic_t *val)74 static inline atomic_count_t atomic_postinc(atomic_t *val) 71 75 { 72 76 atomic_inc(val); … … 74 78 } 75 79 76 static inline longatomic_postdec(atomic_t *val)80 static inline atomic_count_t atomic_postdec(atomic_t *val) 77 81 { 78 82 atomic_dec(val); … … 80 84 } 81 85 82 static inline longatomic_preinc(atomic_t *val)86 static inline atomic_count_t atomic_preinc(atomic_t *val) 83 87 { 84 88 atomic_inc(val); … … 86 90 } 87 91 88 static inline longatomic_predec(atomic_t *val)92 static inline atomic_count_t atomic_predec(atomic_t *val) 89 93 { 90 94 atomic_dec(val); -
kernel/arch/ppc32/include/memstr.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup ppc32 29 /** @addtogroup ppc32 30 30 * @{ 31 31 */ … … 38 38 #define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt)) 39 39 40 extern void memsetw(void *dst, size_t cnt, uint16_t x); 41 extern void memsetb(void *dst, size_t cnt, uint8_t x); 42 43 extern int memcmp(const void *a, const void *b, size_t cnt); 40 extern void memsetw(void *, size_t, uint16_t); 41 extern void memsetb(void *, size_t, uint8_t); 44 42 45 43 #endif -
kernel/arch/ppc32/include/types.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup ppc32 29 /** @addtogroup ppc32 30 30 * @{ 31 31 */ … … 55 55 typedef uint32_t unative_t; 56 56 typedef int32_t native_t; 57 typedef uint32_t atomic_count_t; 57 58 58 59 typedef struct { -
kernel/arch/sparc64/include/atomic.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup sparc64 29 /** @addtogroup sparc64 30 30 * @{ 31 31 */ … … 45 45 * 46 46 * @param val Atomic variable. 47 * @param i Signed value to be added.47 * @param i Signed value to be added. 48 48 * 49 49 * @return Value of the atomic variable as it existed before addition. 50 * 50 51 */ 51 static inline long atomic_add(atomic_t *val, int i)52 static inline atomic_count_t atomic_add(atomic_t *val, atomic_count_t i) 52 53 { 53 uint64_t a, b; 54 54 atomic_count_t a; 55 atomic_count_t b; 56 55 57 do { 56 volatile uintptr_t x = (uint64_t) &val->count;57 58 a = *(( uint64_t *) x);58 volatile uintptr_t ptr = (uintptr_t) &val->count; 59 60 a = *((atomic_count_t *) ptr); 59 61 b = a + i; 60 asm volatile ("casx %0, %2, %1\n" : "+m" (*((uint64_t *)x)), 61 "+r" (b) : "r" (a)); 62 63 asm volatile ( 64 "casx %0, %2, %1\n" 65 : "+m" (*((atomic_count_t *) ptr)), 66 "+r" (b) 67 : "r" (a) 68 ); 62 69 } while (a != b); 63 70 64 71 return a; 65 72 } 66 73 67 static inline longatomic_preinc(atomic_t *val)74 static inline atomic_count_t atomic_preinc(atomic_t *val) 68 75 { 69 76 return atomic_add(val, 1) + 1; 70 77 } 71 78 72 static inline longatomic_postinc(atomic_t *val)79 static inline atomic_count_t atomic_postinc(atomic_t *val) 73 80 { 74 81 return atomic_add(val, 1); 75 82 } 76 83 77 static inline longatomic_predec(atomic_t *val)84 static inline atomic_count_t atomic_predec(atomic_t *val) 78 85 { 79 86 return atomic_add(val, -1) - 1; 80 87 } 81 88 82 static inline longatomic_postdec(atomic_t *val)89 static inline atomic_count_t atomic_postdec(atomic_t *val) 83 90 { 84 91 return atomic_add(val, -1); … … 95 102 } 96 103 97 static inline longtest_and_set(atomic_t *val)104 static inline atomic_count_t test_and_set(atomic_t *val) 98 105 { 99 uint64_t v = 1; 100 volatile uintptr_t x = (uint64_t) &val->count; 101 102 asm volatile ("casx %0, %2, %1\n" : "+m" (*((uint64_t *) x)), 103 "+r" (v) : "r" (0)); 104 106 atomic_count_t v = 1; 107 volatile uintptr_t ptr = (uintptr_t) &val->count; 108 109 asm volatile ( 110 "casx %0, %2, %1\n" 111 : "+m" (*((atomic_count_t *) ptr)), 112 "+r" (v) 113 : "r" (0) 114 ); 115 105 116 return v; 106 117 } … … 108 119 static inline void atomic_lock_arch(atomic_t *val) 109 120 { 110 uint64_t tmp1 = 1;111 uint64_t tmp2 = 0;112 113 volatile uintptr_t x = (uint64_t) &val->count;114 121 atomic_count_t tmp1 = 1; 122 atomic_count_t tmp2 = 0; 123 124 volatile uintptr_t ptr = (uintptr_t) &val->count; 125 115 126 preemption_disable(); 116 127 117 128 asm volatile ( 118 "0:\n" 119 "casx %0, %3, %1\n" 120 "brz %1, 2f\n" 121 "nop\n" 122 "1:\n" 123 "ldx %0, %2\n" 124 "brz %2, 0b\n" 125 "nop\n" 126 "ba %%xcc, 1b\n" 127 "nop\n" 128 "2:\n" 129 : "+m" (*((uint64_t *) x)), "+r" (tmp1), "+r" (tmp2) : "r" (0) 129 "0:\n" 130 "casx %0, %3, %1\n" 131 "brz %1, 2f\n" 132 "nop\n" 133 "1:\n" 134 "ldx %0, %2\n" 135 "brz %2, 0b\n" 136 "nop\n" 137 "ba %%xcc, 1b\n" 138 "nop\n" 139 "2:\n" 140 : "+m" (*((atomic_count_t *) ptr)), 141 "+r" (tmp1), 142 "+r" (tmp2) 143 : "r" (0) 130 144 ); 131 145 -
kernel/arch/sparc64/include/memstr.h
rf516bc2 rc2efbb4 38 38 #define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt)) 39 39 40 extern void memsetw(void *dst, size_t cnt, uint16_t x); 41 extern void memsetb(void *dst, size_t cnt, uint8_t x); 42 43 extern int memcmp(const void *a, const void *b, size_t cnt); 40 extern void memsetw(void *, size_t, uint16_t); 41 extern void memsetb(void *, size_t, uint8_t); 44 42 45 43 #endif -
kernel/arch/sparc64/include/types.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup sparc64 29 /** @addtogroup sparc64 30 30 * @{ 31 31 */ … … 55 55 typedef uint64_t unative_t; 56 56 typedef int64_t native_t; 57 typedef uint64_t atomic_count_t; 57 58 58 59 typedef struct { -
kernel/genarch/include/softint/division.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup genarch 29 /** @addtogroup genarch 30 30 * @{ 31 31 */ -
kernel/generic/include/atomic.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup generic 29 /** @addtogroup generic 30 30 * @{ 31 31 */ … … 36 36 #define KERN_ATOMIC_H_ 37 37 38 #include <arch/types.h> 39 38 40 typedef struct atomic { 39 volatile longcount;41 volatile atomic_count_t count; 40 42 } atomic_t; 41 43 42 44 #include <arch/atomic.h> 43 45 44 static inline void atomic_set(atomic_t *val, longi)46 static inline void atomic_set(atomic_t *val, atomic_count_t i) 45 47 { 46 48 val->count = i; 47 49 } 48 50 49 static inline longatomic_get(atomic_t *val)51 static inline atomic_count_t atomic_get(atomic_t *val) 50 52 { 51 53 return val->count; -
kernel/generic/include/console/console.h
rf516bc2 rc2efbb4 41 41 extern indev_t *stdin; 42 42 extern outdev_t *stdout; 43 extern bool silent;44 43 45 44 extern indev_t *stdin_wire(void); -
kernel/generic/include/ipc/ipc.h
rf516bc2 rc2efbb4 227 227 #ifdef KERNEL 228 228 229 #define IPC_MAX_PHONES 16229 #define IPC_MAX_PHONES 32 230 230 231 231 #include <synch/spinlock.h> -
kernel/generic/include/panic.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup generic 29 /** @addtogroup generic 30 30 * @{ 31 31 */ … … 36 36 #define KERN_PANIC_H_ 37 37 38 #include <typedefs.h> 38 39 #include <stacktrace.h> 39 40 #include <print.h> … … 42 43 # define panic(format, ...) \ 43 44 do { \ 45 silent = false; \ 44 46 printf("Kernel panic in %s() at %s:%u.\n", \ 45 47 __func__, __FILE__, __LINE__); \ … … 50 52 #else 51 53 # define panic(format, ...) \ 52 panic_printf("Kernel panic: " format "\n", ##__VA_ARGS__); 54 do { \ 55 silent = false; \ 56 panic_printf("Kernel panic: " format "\n", ##__VA_ARGS__); \ 57 } while (0) 53 58 #endif 59 60 extern bool silent; 54 61 55 62 extern void panic_printf(char *fmt, ...) __attribute__((noreturn)); -
kernel/generic/include/smp/ipi.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup generic 29 /** @addtogroup generic 30 30 * @{ 31 31 */ … … 37 37 38 38 #ifdef CONFIG_SMP 39 extern void ipi_broadcast(int ipi); 40 extern void ipi_broadcast_arch(int ipi); 39 40 extern void ipi_broadcast(int); 41 extern void ipi_broadcast_arch(int); 42 41 43 #else 42 #define ipi_broadcast(x) ; 44 45 #define ipi_broadcast(ipi) 46 43 47 #endif /* CONFIG_SMP */ 44 48 -
kernel/generic/src/console/console.c
rf516bc2 rc2efbb4 45 45 #include <ipc/irq.h> 46 46 #include <arch.h> 47 #include <panic.h> 47 48 #include <print.h> 48 49 #include <putchar.h> -
kernel/generic/src/ddi/ddi.c
rf516bc2 rc2efbb4 146 146 (btree_key_t) pf, &nodep); 147 147 148 if ((!parea) || (parea->frames < pages)) 148 if ((!parea) || (parea->frames < pages)) { 149 spinlock_unlock(&parea_lock); 149 150 goto err; 151 } 150 152 151 153 spinlock_unlock(&parea_lock); … … 153 155 } 154 156 157 spinlock_unlock(&zones.lock); 155 158 err: 156 spinlock_unlock(&zones.lock);157 159 interrupts_restore(ipl); 158 160 return ENOENT; -
kernel/generic/src/proc/scheduler.c
rf516bc2 rc2efbb4 542 542 { 543 543 thread_t *t; 544 int count, average, j, k = 0; 544 int count; 545 atomic_count_t average; 545 546 unsigned int i; 547 int j; 548 int k = 0; 546 549 ipl_t ipl; 547 550 -
kernel/generic/src/smp/ipi.c
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup generic 29 /** @addtogroup generic 30 30 * @{ 31 31 */ … … 33 33 /** 34 34 * @file 35 * @brief 35 * @brief Generic IPI interface. 36 36 */ 37 37 38 38 #ifdef CONFIG_SMP 39 39 40 40 #include <smp/ipi.h> 41 41 #include <config.h> 42 43 42 44 43 /** Broadcast IPI message … … 49 48 * 50 49 * @bug The decision whether to actually send the IPI must be based 51 * 52 * 53 * 50 * on a different criterion. The current version has 51 * problems when some of the detected CPUs are marked 52 * disabled in machine configuration. 54 53 */ 55 54 void ipi_broadcast(int ipi) … … 60 59 * - if there is only one CPU but the kernel was compiled with CONFIG_SMP 61 60 */ 62 61 63 62 if ((config.cpu_active > 1) && (config.cpu_active == config.cpu_count)) 64 63 ipi_broadcast_arch(ipi); -
kernel/test/fpu/fpu1_ia64.c
rf516bc2 rc2efbb4 128 128 char *test_fpu1(void) 129 129 { 130 unsigned int i, total = 0; 130 unsigned int i; 131 atomic_count_t total = 0; 131 132 132 133 waitq_initialize(&can_start); … … 159 160 waitq_wakeup(&can_start, WAKEUP_ALL); 160 161 161 while (atomic_get(&threads_ok) != (long)total) {162 while (atomic_get(&threads_ok) != total) { 162 163 TPRINTF("Threads left: %d\n", total - atomic_get(&threads_ok)); 163 164 thread_sleep(1); -
kernel/test/fpu/fpu1_x86.c
rf516bc2 rc2efbb4 125 125 char *test_fpu1(void) 126 126 { 127 unsigned int i, total = 0; 127 unsigned int i; 128 atomic_count_t total = 0; 128 129 129 130 waitq_initialize(&can_start); … … 156 157 waitq_wakeup(&can_start, WAKEUP_ALL); 157 158 158 while (atomic_get(&threads_ok) != (long)total) {159 while (atomic_get(&threads_ok) != total) { 159 160 TPRINTF("Threads left: %d\n", total - atomic_get(&threads_ok)); 160 161 thread_sleep(1); -
kernel/test/fpu/mips2.c
rf516bc2 rc2efbb4 111 111 char *test_mips2(void) 112 112 { 113 unsigned int i, total = 0; 113 unsigned int i; 114 atomic_count_t total = 0; 114 115 115 116 waitq_initialize(&can_start); … … 138 139 139 140 TPRINTF("ok\n"); 140 141 141 142 thread_sleep(1); 142 143 waitq_wakeup(&can_start, WAKEUP_ALL); 143 144 144 while (atomic_get(&threads_ok) != (long)total) {145 while (atomic_get(&threads_ok) != total) { 145 146 TPRINTF("Threads left: %d\n", total - atomic_get(&threads_ok)); 146 147 thread_sleep(1); -
kernel/test/fpu/sse1.c
rf516bc2 rc2efbb4 109 109 char *test_sse1(void) 110 110 { 111 unsigned int i, total = 0; 111 unsigned int i; 112 atomic_count_t total = 0; 112 113 113 114 waitq_initialize(&can_start); … … 140 141 waitq_wakeup(&can_start, WAKEUP_ALL); 141 142 142 while (atomic_get(&threads_ok) != (long)total) {143 while (atomic_get(&threads_ok) != total) { 143 144 TPRINTF("Threads left: %d\n", total - atomic_get(&threads_ok)); 144 145 thread_sleep(1); -
kernel/test/synch/rwlock5.c
rf516bc2 rc2efbb4 70 70 { 71 71 int i, j, k; 72 long readers, writers; 72 atomic_count_t readers; 73 atomic_count_t writers; 73 74 74 75 waitq_initialize(&can_start); -
kernel/test/synch/semaphore1.c
rf516bc2 rc2efbb4 73 73 { 74 74 int i, j, k; 75 int consumers, producers; 75 atomic_count_t consumers; 76 atomic_count_t producers; 76 77 77 78 waitq_initialize(&can_start); -
kernel/test/thread/thread1.c
rf516bc2 rc2efbb4 55 55 char *test_thread1(void) 56 56 { 57 unsigned int i, total = 0; 57 unsigned int i; 58 atomic_count_t total = 0; 58 59 59 60 atomic_set(&finish, 1); 60 61 atomic_set(&threads_finished, 0); 61 62 62 for (i = 0; i < THREADS; i++) { 63 for (i = 0; i < THREADS; i++) { 63 64 thread_t *t; 64 65 if (!(t = thread_create(threadtest, NULL, TASK, 0, "threadtest", false))) { … … 74 75 75 76 atomic_set(&finish, 0); 76 while (atomic_get(&threads_finished) < ((long) total)) {77 while (atomic_get(&threads_finished) < total) { 77 78 TPRINTF("Threads left: %d\n", total - atomic_get(&threads_finished)); 78 79 thread_sleep(1); -
uspace/Makefile
rf516bc2 rc2efbb4 60 60 srv/fs/devfs \ 61 61 srv/hid/adb_mouse \ 62 srv/hid/console \63 62 srv/hid/char_mouse \ 64 63 srv/hid/fb \ 65 64 srv/hid/kbd \ 66 srv/hw/char/i8042 65 srv/hw/char/i8042 \ 66 srv/net 67 68 ifneq ($(UARCH),abs32le) 69 DIRS += srv/hid/console 70 endif 67 71 68 72 ifeq ($(UARCH),amd64) -
uspace/app/tester/thread/thread1.c
rf516bc2 rc2efbb4 53 53 { 54 54 unsigned int i; 55 int total = 0;55 atomic_count_t total = 0; 56 56 57 57 atomic_set(&finish, 1); -
uspace/doc/doxygroups.h
rf516bc2 rc2efbb4 26 26 * @ingroup srvcs 27 27 */ 28 28 29 /** 30 * @defgroup net Networking Stack 31 * @ingroup srvcs 32 */ 33 34 /** 35 * @defgroup netif Network interface drivers 36 * @ingroup net 37 */ 38 39 /** 40 * @defgroup lo Loopback Service 41 * @ingroup netif 42 */ 43 44 /** 45 * @defgroup dp8390 Generic DP8390 network interface family service 46 * @ingroup netif 47 */ 48 49 /** 50 * @defgroup ne2k NE2000 network interface family 51 * @ingroup dp8390 52 */ 53 54 /** 55 * @defgroup net_nil Network interface layer 56 * @ingroup net 57 */ 58 59 /** 60 * @defgroup eth Ethernet (IEEE 802.3) network interface layer Service 61 * @ingroup net_nil 62 */ 63 64 /** 65 * @defgroup nildummy Dummy network interface layer Service 66 * @ingroup net_nil 67 */ 68 69 /** 70 * @defgroup net_il Inter-networking layer 71 * @ingroup net 72 */ 73 74 /** 75 * @defgroup arp Address Resolution Protocol (ARP) Service 76 * @ingroup net_il 77 */ 78 79 /** 80 * @defgroup ip Internet Protocol (IP) Service 81 * @ingroup net_il 82 */ 83 84 /** 85 * @defgroup net_tl Transport layer 86 * @ingroup net 87 */ 88 89 /** 90 * @defgroup icmp Internet Control Message Protocol (ICMP) Service 91 * @ingroup net_tl 92 */ 93 94 /** 95 * @defgroup udp User Datagram Protocol (UDP) Service 96 * @ingroup net_tl 97 */ 98 99 /** 100 * @defgroup tcp Transmission Control Protocol (TCP) Service 101 * @ingroup net_tl 102 */ 103 104 /** 105 * @defgroup packet Packet management system 106 * @ingroup net 107 */ 108 109 /** 110 * @defgroup net_app Applications 111 * @ingroup net 112 */ 113 114 /** 115 * @defgroup echo Echo Service 116 * @ingroup net_app 117 */ 118 119 /** 120 * @defgroup ping Ping 121 * @ingroup net_app 122 */ 123 124 /** 125 * @defgroup nettest Networking tests 126 * @ingroup net_app 127 */ 128 129 /** 130 * @defgroup net_lib Application library 131 * @ingroup net 132 */ 133 134 /** 135 * @defgroup socket Sockets 136 * @ingroup net_lib 137 */ 138 139 /** 140 * @defgroup netdb Netdb 141 * @ingroup net_lib 142 */ 143 29 144 /** 30 145 * @cond amd64 -
uspace/lib/Makefile.common
rf516bc2 rc2efbb4 33 33 # Individual makefiles set: 34 34 # 35 # USPACE_PREFIXrelative path to uspace/ directory36 # LIBSlibraries to link with (with relative path)37 # EXTRA_CFLAGSadditional flags to pass to C compiler38 # JOBjob file name (like appname.job)39 # OUTPUToutput binary name (like appname)40 # SOURCESlist of source files35 # USPACE_PREFIX relative path to uspace/ directory 36 # LIBS libraries to link with (with relative path) 37 # EXTRA_CFLAGS additional flags to pass to C compiler 38 # JOB job file name (like appname.job) 39 # OUTPUT output binary name (like appname) 40 # SOURCES list of source files 41 41 # 42 42 … … 72 72 find . -name '*.o' -follow -exec rm \{\} \; 73 73 74 build: 74 build: 75 75 76 76 -include $(DEPEND) -
uspace/lib/libc/Makefile
rf516bc2 rc2efbb4 31 31 32 32 USPACE_PREFIX = $(shell pwd)/../.. 33 #LIBS = $(LIBC_PREFIX)/libc.a34 33 LIBS = 35 34 … … 91 90 generic/stacktrace.c 92 91 93 ARCH_SOURCES = \94 arch/$(UARCH)/src/entry.s \95 arch/$(UARCH)/src/thread_entry.s96 97 92 SOURCES = \ 98 93 $(GENERIC_SOURCES) \ -
uspace/lib/libc/arch/abs32le/src/thread_entry.c
rf516bc2 rc2efbb4 1 1 /* 2 * Copyright (c) 20 07Martin Decky2 * Copyright (c) 2010 Martin Decky 3 3 * All rights reserved. 4 4 * … … 27 27 */ 28 28 29 #ifndef KERN_mips32_DORDER_H_ 30 #define KERN_mips32_DORDER_H_ 29 /** @file 30 */ 31 31 32 extern void ipi_broadcast_arch(int ipi); 32 #include <unistd.h> 33 #include <thread.h> 33 34 34 #endif 35 void __thread_entry(void) 36 { 37 __thread_main(NULL); 38 } 39 40 /** @} 41 */ -
uspace/lib/libc/arch/amd64/Makefile.inc
rf516bc2 rc2efbb4 34 34 TOOLCHAIN_DIR = $(CROSS_PREFIX)/amd64/bin 35 35 36 ARCH_SOURCES += arch/$(UARCH)/src/syscall.S \ 36 ARCH_SOURCES = \ 37 arch/$(UARCH)/src/entry.s \ 38 arch/$(UARCH)/src/thread_entry.s \ 39 arch/$(UARCH)/src/syscall.S \ 37 40 arch/$(UARCH)/src/fibril.S \ 38 41 arch/$(UARCH)/src/tls.c \ -
uspace/lib/libc/arch/amd64/include/atomic.h
rf516bc2 rc2efbb4 42 42 #include <atomicdflt.h> 43 43 44 static inline void atomic_inc(atomic_t *val) { 45 asm volatile ("lock incq %0\n" : "+m" (val->count)); 44 static inline void atomic_inc(atomic_t *val) 45 { 46 asm volatile ( 47 "lock incq %[count]\n" 48 : [count] "+m" (val->count) 49 ); 46 50 } 47 51 48 static inline void atomic_dec(atomic_t *val) { 49 asm volatile ("lock decq %0\n" : "+m" (val->count)); 52 static inline void atomic_dec(atomic_t *val) 53 { 54 asm volatile ( 55 "lock decq %[count]\n" 56 : [count] "+m" (val->count) 57 ); 50 58 } 51 59 52 static inline long atomic_postinc(atomic_t *val)60 static inline atomic_count_t atomic_postinc(atomic_t *val) 53 61 { 54 long r; 55 56 asm volatile ( 57 "movq $1, %0\n" 58 "lock xaddq %0, %1\n" 59 : "=r" (r), "+m" (val->count) 60 ); 61 62 return r; 63 } 64 65 static inline long atomic_postdec(atomic_t *val) 66 { 67 long r; 62 atomic_count_t r = 1; 68 63 69 64 asm volatile ( 70 " movq $-1, %0\n"71 "lock xaddq %0, %1\n"72 : "=r" (r), "+m" (val->count)65 "lock xaddq %[r], %[count]\n" 66 : [count] "+m" (val->count), 67 [r] "+r" (r) 73 68 ); 74 69 … … 76 71 } 77 72 78 #define atomic_preinc(val) (atomic_postinc(val) + 1) 79 #define atomic_predec(val) (atomic_postdec(val) - 1) 73 static inline atomic_count_t atomic_postdec(atomic_t *val) 74 { 75 atomic_count_t r = -1; 76 77 asm volatile ( 78 "lock xaddq %[r], %[count]\n" 79 : [count] "+m" (val->count), 80 [r] "+r" (r) 81 ); 82 83 return r; 84 } 85 86 #define atomic_preinc(val) (atomic_postinc(val) + 1) 87 #define atomic_predec(val) (atomic_postdec(val) - 1) 80 88 81 89 #endif -
uspace/lib/libc/arch/amd64/include/types.h
rf516bc2 rc2efbb4 54 54 55 55 typedef uint64_t uintptr_t; 56 typedef uint64_t atomic_count_t; 57 typedef int64_t atomic_signed_t; 56 58 57 59 #endif -
uspace/lib/libc/arch/arm32/Makefile.inc
rf516bc2 rc2efbb4 34 34 TOOLCHAIN_DIR = $(CROSS_PREFIX)/arm32/bin 35 35 36 ARCH_SOURCES += arch/$(UARCH)/src/syscall.c \ 36 ARCH_SOURCES = \ 37 arch/$(UARCH)/src/entry.s \ 38 arch/$(UARCH)/src/thread_entry.s \ 39 arch/$(UARCH)/src/syscall.c \ 37 40 arch/$(UARCH)/src/fibril.S \ 38 41 arch/$(UARCH)/src/tls.c \ -
uspace/lib/libc/arch/arm32/include/atomic.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup libcarm32 29 /** @addtogroup libcarm32 30 30 * @{ 31 31 */ … … 38 38 39 39 #define LIBC_ARCH_ATOMIC_H_ 40 #define CAS 40 #define CAS 41 41 42 42 #include <atomicdflt.h> … … 46 46 extern uintptr_t *ras_page; 47 47 48 static inline bool cas(atomic_t *val, long ov, longnv)49 { 50 longret = 0;51 48 static inline bool cas(atomic_t *val, atomic_count_t ov, atomic_count_t nv) 49 { 50 atomic_count_t ret = 0; 51 52 52 /* 53 53 * The following instructions between labels 1 and 2 constitute a … … 75 75 : "memory" 76 76 ); 77 77 78 78 ras_page[0] = 0; 79 asm volatile ("" ::: "memory"); 79 asm volatile ( 80 "" ::: "memory" 81 ); 80 82 ras_page[1] = 0xffffffff; 81 83 82 84 return (bool) ret; 83 85 } … … 89 91 * 90 92 * @return Value after addition. 91 */ 92 static inline long atomic_add(atomic_t *val, int i) 93 { 94 long ret = 0; 95 93 * 94 */ 95 static inline atomic_count_t atomic_add(atomic_t *val, atomic_count_t i) 96 { 97 atomic_count_t ret = 0; 98 96 99 /* 97 100 * The following instructions between labels 1 and 2 constitute a … … 115 118 : [imm] "r" (i) 116 119 ); 117 120 118 121 ras_page[0] = 0; 119 asm volatile ("" ::: "memory"); 122 asm volatile ( 123 "" ::: "memory" 124 ); 120 125 ras_page[1] = 0xffffffff; 121 126 122 127 return ret; 123 128 } … … 127 132 * 128 133 * @param val Variable to be incremented. 134 * 129 135 */ 130 136 static inline void atomic_inc(atomic_t *val) … … 137 143 * 138 144 * @param val Variable to be decremented. 145 * 139 146 */ 140 147 static inline void atomic_dec(atomic_t *val) … … 148 155 * @param val Variable to be incremented. 149 156 * @return Value after incrementation. 150 */ 151 static inline long atomic_preinc(atomic_t *val) 157 * 158 */ 159 static inline atomic_count_t atomic_preinc(atomic_t *val) 152 160 { 153 161 return atomic_add(val, 1); … … 159 167 * @param val Variable to be decremented. 160 168 * @return Value after decrementation. 161 */ 162 static inline long atomic_predec(atomic_t *val) 169 * 170 */ 171 static inline atomic_count_t atomic_predec(atomic_t *val) 163 172 { 164 173 return atomic_add(val, -1); … … 170 179 * @param val Variable to be incremented. 171 180 * @return Value before incrementation. 172 */ 173 static inline long atomic_postinc(atomic_t *val) 181 * 182 */ 183 static inline atomic_count_t atomic_postinc(atomic_t *val) 174 184 { 175 185 return atomic_add(val, 1) - 1; … … 181 191 * @param val Variable to be decremented. 182 192 * @return Value before decrementation. 183 */ 184 static inline long atomic_postdec(atomic_t *val) 193 * 194 */ 195 static inline atomic_count_t atomic_postdec(atomic_t *val) 185 196 { 186 197 return atomic_add(val, -1) + 1; -
uspace/lib/libc/arch/arm32/include/types.h
rf516bc2 rc2efbb4 55 55 56 56 typedef uint32_t uintptr_t; 57 typedef uint32_t atomic_count_t; 58 typedef int32_t atomic_signed_t; 57 59 58 60 #endif -
uspace/lib/libc/arch/ia32/Makefile.inc
rf516bc2 rc2efbb4 34 34 TOOLCHAIN_DIR = $(CROSS_PREFIX)/ia32/bin 35 35 36 ARCH_SOURCES += arch/$(UARCH)/src/syscall.S \ 36 ARCH_SOURCES = \ 37 arch/$(UARCH)/src/entry.s \ 38 arch/$(UARCH)/src/thread_entry.s \ 39 arch/$(UARCH)/src/syscall.S \ 37 40 arch/$(UARCH)/src/fibril.S \ 38 41 arch/$(UARCH)/src/tls.c \ -
uspace/lib/libc/arch/ia32/include/atomic.h
rf516bc2 rc2efbb4 40 40 #include <atomicdflt.h> 41 41 42 static inline void atomic_inc(atomic_t *val) { 43 asm volatile ("lock incl %0\n" : "+m" (val->count)); 42 static inline void atomic_inc(atomic_t *val) 43 { 44 asm volatile ( 45 "lock incl %[count]\n" 46 : [count] "+m" (val->count) 47 ); 44 48 } 45 49 46 static inline void atomic_dec(atomic_t *val) { 47 asm volatile ("lock decl %0\n" : "+m" (val->count)); 50 static inline void atomic_dec(atomic_t *val) 51 { 52 asm volatile ( 53 "lock decl %[count]\n" 54 : [count] "+m" (val->count) 55 ); 48 56 } 49 57 50 static inline long atomic_postinc(atomic_t *val)58 static inline atomic_count_t atomic_postinc(atomic_t *val) 51 59 { 52 long r; 53 54 asm volatile ( 55 "movl $1, %0\n" 56 "lock xaddl %0, %1\n" 57 : "=r" (r), "+m" (val->count) 58 ); 59 60 return r; 61 } 62 63 static inline long atomic_postdec(atomic_t *val) 64 { 65 long r; 60 atomic_count_t r = 1; 66 61 67 62 asm volatile ( 68 " movl $-1, %0\n"69 "lock xaddl %0, %1\n"70 : "=r" (r), "+m" (val->count)63 "lock xaddl %[r], %[count]\n" 64 : [count] "+m" (val->count), 65 [r] "+r" (r) 71 66 ); 72 67 … … 74 69 } 75 70 76 #define atomic_preinc(val) (atomic_postinc(val) + 1) 77 #define atomic_predec(val) (atomic_postdec(val) - 1) 71 static inline atomic_count_t atomic_postdec(atomic_t *val) 72 { 73 atomic_count_t r = -1; 74 75 asm volatile ( 76 "lock xaddl %[r], %[count]\n" 77 : [count] "+m" (val->count), 78 [r] "+r" (r) 79 ); 80 81 return r; 82 } 83 84 #define atomic_preinc(val) (atomic_postinc(val) + 1) 85 #define atomic_predec(val) (atomic_postdec(val) - 1) 78 86 79 87 #endif -
uspace/lib/libc/arch/ia32/include/types.h
rf516bc2 rc2efbb4 54 54 55 55 typedef uint32_t uintptr_t; 56 typedef uint32_t atomic_count_t; 57 typedef int32_t atomic_signed_t; 56 58 57 59 #endif -
uspace/lib/libc/arch/ia64/Makefile.inc
rf516bc2 rc2efbb4 33 33 TOOLCHAIN_DIR = $(CROSS_PREFIX)/ia64/bin 34 34 35 ARCH_SOURCES += arch/$(UARCH)/src/syscall.S \ 35 ARCH_SOURCES = \ 36 arch/$(UARCH)/src/entry.s \ 37 arch/$(UARCH)/src/thread_entry.s \ 38 arch/$(UARCH)/src/syscall.S \ 36 39 arch/$(UARCH)/src/fibril.S \ 37 40 arch/$(UARCH)/src/tls.c \ -
uspace/lib/libc/arch/ia64/include/atomic.h
rf516bc2 rc2efbb4 42 42 static inline void atomic_inc(atomic_t *val) 43 43 { 44 longv;44 atomic_count_t v; 45 45 46 46 asm volatile ( … … 53 53 static inline void atomic_dec(atomic_t *val) 54 54 { 55 longv;55 atomic_count_t v; 56 56 57 57 asm volatile ( … … 62 62 } 63 63 64 static inline longatomic_preinc(atomic_t *val)64 static inline atomic_count_t atomic_preinc(atomic_t *val) 65 65 { 66 longv;66 atomic_count_t v; 67 67 68 68 asm volatile ( … … 75 75 } 76 76 77 static inline longatomic_predec(atomic_t *val)77 static inline atomic_count_t atomic_predec(atomic_t *val) 78 78 { 79 longv;79 atomic_count_t v; 80 80 81 81 asm volatile ( … … 88 88 } 89 89 90 static inline longatomic_postinc(atomic_t *val)90 static inline atomic_count_t atomic_postinc(atomic_t *val) 91 91 { 92 longv;92 atomic_count_t v; 93 93 94 94 asm volatile ( … … 101 101 } 102 102 103 static inline longatomic_postdec(atomic_t *val)103 static inline atomic_count_t atomic_postdec(atomic_t *val) 104 104 { 105 longv;105 atomic_count_t v; 106 106 107 107 asm volatile ( -
uspace/lib/libc/arch/ia64/include/types.h
rf516bc2 rc2efbb4 59 59 60 60 typedef uint64_t uintptr_t; 61 typedef uint64_t atomic_count_t; 62 typedef int64_t atomic_signed_t; 61 63 62 64 typedef struct { -
uspace/lib/libc/arch/mips32/Makefile.inc
rf516bc2 rc2efbb4 33 33 TOOLCHAIN_DIR = $(CROSS_PREFIX)/mips32/bin 34 34 35 ARCH_SOURCES += arch/$(UARCH)/src/syscall.c \ 35 ARCH_SOURCES = \ 36 arch/$(UARCH)/src/entry.s \ 37 arch/$(UARCH)/src/thread_entry.s \ 38 arch/$(UARCH)/src/syscall.c \ 36 39 arch/$(UARCH)/src/fibril.S \ 37 40 arch/$(UARCH)/src/tls.c \ -
uspace/lib/libc/arch/mips32/include/atomic.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup libcmips32 29 /** @addtogroup libcmips32 30 30 * @{ 31 31 */ 32 32 /** @file 33 * @ingroup libcmips32eb 33 * @ingroup libcmips32eb 34 34 */ 35 35 … … 41 41 #include <atomicdflt.h> 42 42 43 #define atomic_inc(x) 44 #define atomic_dec(x) 43 #define atomic_inc(x) ((void) atomic_add(x, 1)) 44 #define atomic_dec(x) ((void) atomic_add(x, -1)) 45 45 46 #define atomic_postinc(x) (atomic_add(x, 1) - 1)47 #define atomic_postdec(x) (atomic_add(x, -1) + 1)46 #define atomic_postinc(x) (atomic_add(x, 1) - 1) 47 #define atomic_postdec(x) (atomic_add(x, -1) + 1) 48 48 49 #define atomic_preinc(x) atomic_add(x, 1)50 #define atomic_predec(x) atomic_add(x, -1)49 #define atomic_preinc(x) atomic_add(x, 1) 50 #define atomic_predec(x) atomic_add(x, -1) 51 51 52 52 /* Atomic addition of immediate value. 53 53 * 54 54 * @param val Memory location to which will be the immediate value added. 55 * @param i Signed immediate that will be added to *val.55 * @param i Signed immediate that will be added to *val. 56 56 * 57 57 * @return Value after addition. 58 * 58 59 */ 59 static inline long atomic_add(atomic_t *val, int i)60 static inline atomic_count_t atomic_add(atomic_t *val, atomic_count_t i) 60 61 { 61 long tmp, v; 62 62 atomic_count_t tmp; 63 atomic_count_t v; 64 63 65 asm volatile ( 64 66 "1:\n" … … 70 72 /* nop */ /* nop is inserted automatically by compiler */ 71 73 " nop\n" 72 : "=&r" (tmp), "+m" (val->count), "=&r" (v) 73 : "r" (i), "i" (0) 74 ); 75 74 : "=&r" (tmp), 75 "+m" (val->count), 76 "=&r" (v) 77 : "r" (i), 78 "i" (0) 79 ); 80 76 81 return v; 77 82 } -
uspace/lib/libc/arch/mips32/include/types.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup libcmips32 29 /** @addtogroup libcmips32 30 30 * @{ 31 31 */ … … 55 55 56 56 typedef uint32_t uintptr_t; 57 typedef uint32_t atomic_count_t; 58 typedef int32_t atomic_signed_t; 57 59 58 60 #endif -
uspace/lib/libc/arch/mips32eb/Makefile.inc
rf516bc2 rc2efbb4 33 33 TOOLCHAIN_DIR = $(CROSS_PREFIX)/mips32eb/bin 34 34 35 ARCH_SOURCES += arch/$(UARCH)/src/syscall.c \ 35 ARCH_SOURCES = \ 36 arch/$(UARCH)/src/entry.s \ 37 arch/$(UARCH)/src/thread_entry.s \ 38 arch/$(UARCH)/src/syscall.c \ 36 39 arch/$(UARCH)/src/fibril.S \ 37 40 arch/$(UARCH)/src/tls.c \ -
uspace/lib/libc/arch/ppc32/Makefile.inc
rf516bc2 rc2efbb4 33 33 TOOLCHAIN_DIR = $(CROSS_PREFIX)/ppc32/bin 34 34 35 ARCH_SOURCES += arch/$(UARCH)/src/syscall.c \ 35 ARCH_SOURCES = \ 36 arch/$(UARCH)/src/entry.s \ 37 arch/$(UARCH)/src/thread_entry.s \ 38 arch/$(UARCH)/src/syscall.c \ 36 39 arch/$(UARCH)/src/fibril.S \ 37 40 arch/$(UARCH)/src/tls.c \ -
uspace/lib/libc/arch/ppc32/include/atomic.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup libcppc32 29 /** @addtogroup libcppc32 30 30 * @{ 31 31 */ … … 42 42 static inline void atomic_inc(atomic_t *val) 43 43 { 44 longtmp;45 44 atomic_count_t tmp; 45 46 46 asm volatile ( 47 47 "1:\n" … … 50 50 "stwcx. %0, 0, %2\n" 51 51 "bne- 1b" 52 : "=&r" (tmp), "=m" (val->count) 53 : "r" (&val->count), "m" (val->count) 54 : "cc"); 52 : "=&r" (tmp), 53 "=m" (val->count) 54 : "r" (&val->count), 55 "m" (val->count) 56 : "cc" 57 ); 55 58 } 56 59 57 60 static inline void atomic_dec(atomic_t *val) 58 61 { 59 longtmp;60 62 atomic_count_t tmp; 63 61 64 asm volatile ( 62 65 "1:\n" 63 66 "lwarx %0, 0, %2\n" 64 67 "addic %0, %0, -1\n" 65 "stwcx. 68 "stwcx. %0, 0, %2\n" 66 69 "bne- 1b" 67 : "=&r" (tmp), "=m" (val->count) 68 : "r" (&val->count), "m" (val->count) 69 : "cc"); 70 : "=&r" (tmp), 71 "=m" (val->count) 72 : "r" (&val->count), 73 "m" (val->count) 74 : "cc" 75 ); 70 76 } 71 77 72 static inline longatomic_postinc(atomic_t *val)78 static inline atomic_count_t atomic_postinc(atomic_t *val) 73 79 { 74 80 atomic_inc(val); … … 76 82 } 77 83 78 static inline longatomic_postdec(atomic_t *val)84 static inline atomic_count_t atomic_postdec(atomic_t *val) 79 85 { 80 86 atomic_dec(val); … … 82 88 } 83 89 84 static inline longatomic_preinc(atomic_t *val)90 static inline atomic_count_t atomic_preinc(atomic_t *val) 85 91 { 86 92 atomic_inc(val); … … 88 94 } 89 95 90 static inline longatomic_predec(atomic_t *val)96 static inline atomic_count_t atomic_predec(atomic_t *val) 91 97 { 92 98 atomic_dec(val); -
uspace/lib/libc/arch/ppc32/include/types.h
rf516bc2 rc2efbb4 27 27 */ 28 28 29 /** @addtogroup libcppc32 29 /** @addtogroup libcppc32 30 30 * @{ 31 31 */ … … 54 54 55 55 typedef uint32_t uintptr_t; 56 typedef uint32_t atomic_count_t; 57 typedef int32_t atomic_signed_t; 56 58 57 59 #endif -
uspace/lib/libc/arch/sparc64/Makefile.inc
rf516bc2 rc2efbb4 33 33 TOOLCHAIN_DIR = $(CROSS_PREFIX)/sparc64/bin 34 34 35 ARCH_SOURCES += arch/$(UARCH)/src/fibril.S \ 35 ARCH_SOURCES = \ 36 arch/$(UARCH)/src/entry.s \ 37 arch/$(UARCH)/src/thread_entry.s \ 38 arch/$(UARCH)/src/fibril.S \ 36 39 arch/$(UARCH)/src/tls.c \ 37 40 arch/$(UARCH)/src/stacktrace.c \ -
uspace/lib/libc/arch/sparc64/include/atomic.h
rf516bc2 rc2efbb4 46 46 * 47 47 * @param val Atomic variable. 48 * @param i Signed value to be added.48 * @param i Signed value to be added. 49 49 * 50 50 * @return Value of the atomic variable as it existed before addition. 51 * 51 52 */ 52 static inline long atomic_add(atomic_t *val, int i)53 static inline atomic_count_t atomic_add(atomic_t *val, atomic_count_t i) 53 54 { 54 uint64_t a, b; 55 55 atomic_count_t a; 56 atomic_count_t b; 57 56 58 do { 57 volatile uintptr_t x = (uint64_t) &val->count;58 59 a = *(( uint64_t *) x);59 volatile uintptr_t ptr = (uintptr_t) &val->count; 60 61 a = *((atomic_count_t *) ptr); 60 62 b = a + i; 61 asm volatile ("casx %0, %2, %1\n" : "+m" (*((uint64_t *)x)), "+r" (b) : "r" (a)); 63 64 asm volatile ( 65 "casx %0, %2, %1\n" 66 : "+m" (*((atomic_count_t *) ptr)), 67 "+r" (b) 68 : "r" (a) 69 ); 62 70 } while (a != b); 63 71 64 72 return a; 65 73 } 66 74 67 static inline longatomic_preinc(atomic_t *val)75 static inline atomic_count_t atomic_preinc(atomic_t *val) 68 76 { 69 77 return atomic_add(val, 1) + 1; 70 78 } 71 79 72 static inline longatomic_postinc(atomic_t *val)80 static inline atomic_count_t atomic_postinc(atomic_t *val) 73 81 { 74 82 return atomic_add(val, 1); 75 83 } 76 84 77 static inline longatomic_predec(atomic_t *val)85 static inline atomic_count_t atomic_predec(atomic_t *val) 78 86 { 79 87 return atomic_add(val, -1) - 1; 80 88 } 81 89 82 static inline longatomic_postdec(atomic_t *val)90 static inline atomic_count_t atomic_postdec(atomic_t *val) 83 91 { 84 92 return atomic_add(val, -1); -
uspace/lib/libc/arch/sparc64/include/types.h
rf516bc2 rc2efbb4 54 54 55 55 typedef uint64_t uintptr_t; 56 typedef uint64_t atomic_count_t; 57 typedef int64_t atomic_signed_t; 56 58 57 59 #endif -
uspace/lib/libc/generic/async.c
rf516bc2 rc2efbb4 1101 1101 } 1102 1102 1103 /** Wrapper for making IPC_M_CONNECT_ME_TO calls using the async framework. 1104 * 1105 * Ask through phone for a new connection to some service. 1106 * 1107 * @param phoneid Phone handle used for contacting the other side. 1108 * @param arg1 User defined argument. 1109 * @param arg2 User defined argument. 1110 * @param arg3 User defined argument. 1111 * 1112 * @return New phone handle on success or a negative error code. 1113 */ 1114 int 1115 async_connect_me_to(int phoneid, ipcarg_t arg1, ipcarg_t arg2, ipcarg_t arg3) 1116 { 1117 int rc; 1118 ipcarg_t newphid; 1119 1120 rc = async_req_3_5(phoneid, IPC_M_CONNECT_ME_TO, arg1, arg2, arg3, NULL, 1121 NULL, NULL, NULL, &newphid); 1122 1123 if (rc != EOK) 1124 return rc; 1125 1126 return newphid; 1127 } 1128 1129 /** Wrapper for making IPC_M_CONNECT_ME_TO calls using the async framework. 1130 * 1131 * Ask through phone for a new connection to some service and block until 1132 * success. 1133 * 1134 * @param phoneid Phone handle used for contacting the other side. 1135 * @param arg1 User defined argument. 1136 * @param arg2 User defined argument. 1137 * @param arg3 User defined argument. 1138 * 1139 * @return New phone handle on success or a negative error code. 1140 */ 1141 int 1142 async_connect_me_to_blocking(int phoneid, ipcarg_t arg1, ipcarg_t arg2, 1143 ipcarg_t arg3) 1144 { 1145 int rc; 1146 ipcarg_t newphid; 1147 1148 rc = async_req_4_5(phoneid, IPC_M_CONNECT_ME_TO, arg1, arg2, arg3, 1149 IPC_FLAG_BLOCKING, NULL, NULL, NULL, NULL, &newphid); 1150 1151 if (rc != EOK) 1152 return rc; 1153 1154 return newphid; 1155 } 1156 1103 1157 /** Wrapper for making IPC_M_SHARE_IN calls using the async framework. 1104 1158 * -
uspace/lib/libc/generic/futex.c
rf516bc2 rc2efbb4 68 68 int futex_down(futex_t *futex) 69 69 { 70 if ( atomic_predec(futex) < 0)70 if ((atomic_signed_t) atomic_predec(futex) < 0) 71 71 return __SYSCALL1(SYS_FUTEX_SLEEP, (sysarg_t) &futex->count); 72 72 … … 82 82 int futex_up(futex_t *futex) 83 83 { 84 if ( atomic_postinc(futex) < 0)84 if ((atomic_signed_t) atomic_postinc(futex) < 0) 85 85 return __SYSCALL1(SYS_FUTEX_WAKEUP, (sysarg_t) &futex->count); 86 86 -
uspace/lib/libc/include/async.h
rf516bc2 rc2efbb4 259 259 } 260 260 261 extern int async_connect_me_to(int, ipcarg_t, ipcarg_t, ipcarg_t); 262 extern int async_connect_me_to_blocking(int, ipcarg_t, ipcarg_t, ipcarg_t); 263 261 264 /* 262 265 * User-friendly wrappers for async_share_in_start(). -
uspace/lib/libc/include/atomicdflt.h
rf516bc2 rc2efbb4 37 37 38 38 #ifndef LIBC_ARCH_ATOMIC_H_ 39 #error This file cannot be included directly, include atomic.h instead.39 #error This file cannot be included directly, include atomic.h instead. 40 40 #endif 41 41 42 #include <stdint.h> 42 43 #include <bool.h> 43 44 44 45 typedef struct atomic { 45 volatile longcount;46 volatile atomic_count_t count; 46 47 } atomic_t; 47 48 48 static inline void atomic_set(atomic_t *val, longi)49 static inline void atomic_set(atomic_t *val, atomic_count_t i) 49 50 { 50 51 val->count = i; 51 52 } 52 53 53 static inline longatomic_get(atomic_t *val)54 static inline atomic_count_t atomic_get(atomic_t *val) 54 55 { 55 56 return val->count; 56 57 } 57 58 58 #ifndef CAS 59 static inline bool cas(atomic_t *val, long ov, longnv)59 #ifndef CAS 60 static inline bool cas(atomic_t *val, atomic_count_t ov, atomic_count_t nv) 60 61 { 61 62 return __sync_bool_compare_and_swap(&val->count, ov, nv); -
uspace/lib/libc/include/ipc/services.h
rf516bc2 rc2efbb4 47 47 SERVICE_FHC, 48 48 SERVICE_OBIO, 49 SERVICE_CLIPBOARD 49 SERVICE_CLIPBOARD, 50 SERVICE_NETWORKING, 51 SERVICE_LO, 52 SERVICE_DP8390, 53 SERVICE_ETHERNET, 54 SERVICE_NILDUMMY, 55 SERVICE_IP, 56 SERVICE_ARP, 57 SERVICE_RARP, 58 SERVICE_ICMP, 59 SERVICE_UDP, 60 SERVICE_TCP, 61 SERVICE_SOCKET 50 62 } services_t; 51 63 -
uspace/lib/libc/include/stacktrace.h
rf516bc2 rc2efbb4 57 57 extern void stacktrace_prepare(void); 58 58 extern uintptr_t stacktrace_fp_get(void); 59 extern uintptr_t stacktrace_pc_get( );59 extern uintptr_t stacktrace_pc_get(void); 60 60 61 61 #endif -
uspace/srv/hid/kbd/Makefile.build
rf516bc2 rc2efbb4 150 150 endif 151 151 152 ifeq ($(UARCH),abs32le) 153 SOURCES += \ 154 port/dummy.c \ 155 ctl/pc.c 156 endif 157 152 158 OBJECTS := $(addsuffix .o,$(basename $(SOURCES))) 153 159 -
uspace/srv/loader/include/arch.h
rf516bc2 rc2efbb4 37 37 #define LOADER_ARCH_H_ 38 38 39 void program_run(void *entry_point, void *pcb);39 extern void program_run(void *entry_point, void *pcb); 40 40 41 41 #endif
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