Changeset c4a5207f in mainline
- Timestamp:
- 2005-05-08T19:53:05Z (20 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 0ca6faa
- Parents:
- 4e1d008
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia32/include/context.h
r4e1d008 rc4a5207f 33 33 34 34 struct fpu_context { 35 __u8 fpu[512]; //FXSAVE & FXRSTOR storage area size 35 __u8 fpu[512]; /* FXSAVE & FXRSTOR storage area */ 36 36 }; 37 37 -
arch/ia64/Makefile.inc
r4e1d008 rc4a5207f 19 19 arch/fake.s \ 20 20 arch/putchar.c \ 21 arch/context.S \ 21 22 arch/ia64.c -
arch/ia64/include/context.h
r4e1d008 rc4a5207f 33 33 34 34 struct fpu_context { 35 //Don't understand IA-64 fpu environment 35 /* TODO: define IA-64 FPU context */ 36 36 }; 37 37 -
arch/ia64/src/fake.s
r4e1d008 rc4a5207f 36 36 .global arch_post_mm_init 37 37 .global arch_pre_mm_init 38 .global context_restore39 .global context_save40 38 .global cpu_arch_init 41 39 .global cpu_halt … … 59 57 arch_post_mm_init: 60 58 arch_pre_mm_init: 61 context_restore:62 context_save:63 59 cpu_arch_init: 64 60 cpu_halt: -
arch/ia64/src/start.S
r4e1d008 rc4a5207f 45 45 break 0x80000 46 46 47 br.call.sptk.many rp=main_bsp 48 47 49 0: 48 50 br 0b -
arch/mips/include/context.h
r4e1d008 rc4a5207f 33 33 34 34 struct fpu_context { 35 //Don't understand MIPS fpu environment 35 /* TODO: define MIPS FPU context */ 36 36 }; 37 37 -
doc/TODO
r4e1d008 rc4a5207f 10 10 + get user mode support for all architectures 11 11 12 + when a new thread enters scheduler, at least one CPU in13 cpu_sleep() should be woken up by an IPI14 12 + save/restore floating point context on context switch 15 13 + [ia32] lazy context switch using TS flag
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