Changes in uspace/drv/nic/e1k/e1k.c [e86b8f0:c4be33a] in mainline
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/nic/e1k/e1k.c
re86b8f0 rc4be33a 44 44 #include <libarch/ddi.h> 45 45 #include <as.h> 46 #include <ddf/log.h>47 46 #include <ddf/interrupt.h> 48 47 #include <devman.h> … … 52 51 #include <nil_remote.h> 53 52 #include <ops/nic.h> 53 #include <packet_client.h> 54 #include <packet_remote.h> 55 #include <net/packet_header.h> 54 56 #include "e1k.h" 55 57 … … 59 61 60 62 /* Must be power of 8 */ 61 #define E1000_RX_ FRAME_COUNT 12862 #define E1000_TX_ FRAME_COUNT 12863 #define E1000_RX_PACKETS_COUNT 128 64 #define E1000_TX_PACKETS_COUNT 128 63 65 64 66 #define E1000_RECEIVE_ADDRESS 16 65 67 66 /** Maximum sending frame size */ 67 #define E1000_MAX_SEND_FRAME_SIZE 2048 68 /** Maximum receiving frame size */ 69 #define E1000_MAX_RECEIVE_FRAME_SIZE 2048 68 /** Maximum receiving packet size */ 69 #define E1000_MAX_RECEIVE_PACKET_SIZE 2048 70 70 71 71 /** nic_driver_data_t* -> e1000_t* cast */ … … 111 111 /** E1000 device data */ 112 112 typedef struct { 113 /** Device configuration */114 e1000_info_t info;115 116 113 /** Physical registers base address */ 117 114 void *reg_base_phys; … … 124 121 void *tx_ring_virt; 125 122 126 /** Ring of TX frames, physical address */ 127 void **tx_frame_phys; 128 /** Ring of TX frames, virtual address */ 129 void **tx_frame_virt; 123 /** Packets in tx ring */ 124 packet_t **tx_ring_packets; 130 125 131 126 /** Physical rx ring address */ … … 134 129 void *rx_ring_virt; 135 130 136 /** Ring of RX frames, physical address */ 137 void **rx_frame_phys; 138 /** Ring of RX frames, virtual address */ 139 void **rx_frame_virt; 131 /** Packets in rx ring */ 132 packet_t **rx_ring_packets; 140 133 141 134 /** VLAN tag */ 142 135 uint16_t vlan_tag; 143 136 144 /** Add VLAN tag to frame*/137 /** Add VLAN tag to packet */ 145 138 bool vlan_tag_add; 146 139 … … 150 143 /** Used milticast Receive addrress count */ 151 144 unsigned int multicast_ra_count; 145 146 /** PCI device ID */ 147 uint16_t device_id; 152 148 153 149 /** The irq assigned */ … … 226 222 static int e1000_on_activating(nic_t *); 227 223 static int e1000_on_stopping(nic_t *); 228 static void e1000_ send_frame(nic_t *, void *, size_t);224 static void e1000_write_packet(nic_t *, packet_t *); 229 225 230 226 /** Commands to deal with interrupt … … 476 472 } 477 473 478 /** Get state of acceptance of weird frames474 /** Get state of acceptance of weird packets 479 475 * 480 476 * @param device Device to check … … 494 490 }; 495 491 496 /** Set acceptance of weird frames492 /** Set acceptance of weird packets 497 493 * 498 494 * @param device Device to update … … 678 674 } 679 675 680 /** Disable receiving frames for default address676 /** Disable receiving packets for default address 681 677 * 682 678 * @param e1000 E1000 data structure … … 690 686 } 691 687 692 /** Enable receiving frames for default address688 /** Enable receiving packets for default address 693 689 * 694 690 * @param e1000 E1000 data structure … … 750 746 } 751 747 752 /** Enable accepting of broadcast frames748 /** Enable accepting of broadcast packets 753 749 * 754 750 * @param e1000 E1000 data structure … … 762 758 } 763 759 764 /** Disable accepting of broadcast frames760 /** Disable accepting of broadcast packets 765 761 * 766 762 * @param e1000 E1000 data structure … … 798 794 } 799 795 800 /** Set multicast frames acceptance mode796 /** Set multicast packets acceptance mode 801 797 * 802 798 * @param nic NIC device to update … … 852 848 } 853 849 854 /** Set unicast frames acceptance mode850 /** Set unicast packets acceptance mode 855 851 * 856 852 * @param nic NIC device to update … … 910 906 } 911 907 912 /** Set broadcast frames acceptance mode908 /** Set broadcast packets acceptance mode 913 909 * 914 910 * @param nic NIC device to update … … 995 991 if (vlan_mask) { 996 992 /* 997 * Disable receiving, so that framematching993 * Disable receiving, so that packet matching 998 994 * partially written VLAN is not received. 999 995 */ … … 1062 1058 } 1063 1059 1064 /** Fill receive descriptor with new empty buffer1065 * 1066 * Store frame in e1000->rx_frame_phys1060 /** Fill receive descriptor with new empty packet 1061 * 1062 * Store packet in e1000->rx_ring_packets 1067 1063 * 1068 1064 * @param nic NIC data stricture … … 1073 1069 { 1074 1070 e1000_t *e1000 = DRIVER_DATA_NIC(nic); 1075 1071 packet_t *packet = 1072 nic_alloc_packet(nic, E1000_MAX_RECEIVE_PACKET_SIZE); 1073 1074 assert(packet); 1075 1076 *(e1000->rx_ring_packets + offset) = packet; 1076 1077 e1000_rx_descriptor_t *rx_descriptor = (e1000_rx_descriptor_t *) 1077 1078 (e1000->rx_ring_virt + offset * sizeof(e1000_rx_descriptor_t)); 1078 1079 1079 rx_descriptor->phys_addr = PTR_TO_U64(e1000->rx_frame_phys[offset]); 1080 void *phys; 1081 int rc = 1082 nic_dma_lock_packet(packet, E1000_MAX_RECEIVE_PACKET_SIZE, &phys); 1083 1084 if (rc == EOK) 1085 rx_descriptor->phys_addr = PTR_TO_U64(phys + packet->data_start); 1086 else 1087 rx_descriptor->phys_addr = 0; 1088 1080 1089 rx_descriptor->length = 0; 1081 1090 rx_descriptor->checksum = 0; … … 1115 1124 e1000_tx_descriptor_t *tx_descriptor = (e1000_tx_descriptor_t *) 1116 1125 (e1000->tx_ring_virt + offset * sizeof(e1000_tx_descriptor_t)); 1126 1127 if (tx_descriptor->length) { 1128 packet_t *old_packet = *(e1000->tx_ring_packets + offset); 1129 if (old_packet) 1130 nic_release_packet(nic, old_packet); 1131 } 1117 1132 1118 1133 tx_descriptor->phys_addr = 0; … … 1141 1156 } 1142 1157 1143 /** Receive frames1158 /** Receive packets 1144 1159 * 1145 1160 * @param nic NIC data 1146 1161 * 1147 1162 */ 1148 static void e1000_receive_ frames(nic_t *nic)1163 static void e1000_receive_packets(nic_t *nic) 1149 1164 { 1150 1165 e1000_t *e1000 = DRIVER_DATA_NIC(nic); … … 1153 1168 1154 1169 uint32_t *tail_addr = E1000_REG_ADDR(e1000, E1000_RDT); 1155 uint32_t next_tail = e1000_inc_tail(*tail_addr, E1000_RX_ FRAME_COUNT);1170 uint32_t next_tail = e1000_inc_tail(*tail_addr, E1000_RX_PACKETS_COUNT); 1156 1171 1157 1172 e1000_rx_descriptor_t *rx_descriptor = (e1000_rx_descriptor_t *) … … 1159 1174 1160 1175 while (rx_descriptor->status & 0x01) { 1161 uint32_t frame_size = rx_descriptor->length - E1000_CRC_SIZE;1176 uint32_t packet_size = rx_descriptor->length - E1000_CRC_SIZE; 1162 1177 1163 nic_frame_t *frame = nic_alloc_frame(nic, frame_size); 1164 if (frame != NULL) { 1165 memcpy(frame->data, e1000->rx_frame_virt[next_tail], frame_size); 1166 nic_received_frame(nic, frame); 1167 } else { 1168 ddf_msg(LVL_ERROR, "Memory allocation failed. Frame dropped."); 1169 } 1178 packet_t *packet = *(e1000->rx_ring_packets + next_tail); 1179 packet_suffix(packet, packet_size); 1180 1181 nic_dma_unlock_packet(packet, E1000_MAX_RECEIVE_PACKET_SIZE); 1182 nic_received_packet(nic, packet); 1170 1183 1171 1184 e1000_fill_new_rx_descriptor(nic, next_tail); 1172 1185 1173 *tail_addr = e1000_inc_tail(*tail_addr, E1000_RX_ FRAME_COUNT);1174 next_tail = e1000_inc_tail(*tail_addr, E1000_RX_ FRAME_COUNT);1186 *tail_addr = e1000_inc_tail(*tail_addr, E1000_RX_PACKETS_COUNT); 1187 next_tail = e1000_inc_tail(*tail_addr, E1000_RX_PACKETS_COUNT); 1175 1188 1176 1189 rx_descriptor = (e1000_rx_descriptor_t *) … … 1213 1226 { 1214 1227 if (icr & ICR_RXT0) 1215 e1000_receive_ frames(nic);1228 e1000_receive_packets(nic); 1216 1229 } 1217 1230 … … 1262 1275 } 1263 1276 1264 /** Force receiving all frames in the receive buffer1277 /** Force receiving all packets in the receive buffer 1265 1278 * 1266 1279 * @param nic NIC data … … 1335 1348 static void e1000_initialize_rx_registers(e1000_t *e1000) 1336 1349 { 1337 E1000_REG_WRITE(e1000, E1000_RDLEN, E1000_RX_ FRAME_COUNT * 16);1350 E1000_REG_WRITE(e1000, E1000_RDLEN, E1000_RX_PACKETS_COUNT * 16); 1338 1351 E1000_REG_WRITE(e1000, E1000_RDH, 0); 1339 1352 1340 1353 /* It is not posible to let HW use all descriptors */ 1341 E1000_REG_WRITE(e1000, E1000_RDT, E1000_RX_ FRAME_COUNT - 1);1354 E1000_REG_WRITE(e1000, E1000_RDT, E1000_RX_PACKETS_COUNT - 1); 1342 1355 1343 1356 /* Set Broadcast Enable Bit */ … … 1359 1372 1360 1373 int rc = dmamem_map_anonymous( 1361 E1000_RX_ FRAME_COUNT * sizeof(e1000_rx_descriptor_t),1374 E1000_RX_PACKETS_COUNT * sizeof(e1000_rx_descriptor_t), 1362 1375 AS_AREA_READ | AS_AREA_WRITE, 0, &e1000->rx_ring_phys, 1363 1376 &e1000->rx_ring_virt); … … 1370 1383 (uint32_t) PTR_TO_U64(e1000->rx_ring_phys)); 1371 1384 1372 e1000->rx_frame_phys = 1373 calloc(E1000_RX_FRAME_COUNT, sizeof(void *)); 1374 e1000->rx_frame_virt = 1375 calloc(E1000_RX_FRAME_COUNT, sizeof(void *)); 1376 if (e1000->rx_frame_phys == NULL || e1000->rx_frame_virt == NULL) { 1377 rc = ENOMEM; 1378 goto error; 1379 } 1380 1381 size_t i; 1382 void *frame_virt; 1383 void *frame_phys; 1384 1385 for (i = 0; i < E1000_RX_FRAME_COUNT; i++) { 1386 rc = dmamem_map_anonymous( 1387 E1000_MAX_SEND_FRAME_SIZE, AS_AREA_READ | AS_AREA_WRITE, 1388 0, &frame_phys, &frame_virt); 1389 if (rc != EOK) 1390 goto error; 1391 1392 e1000->rx_frame_virt[i] = frame_virt; 1393 e1000->rx_frame_phys[i] = frame_phys; 1394 } 1385 e1000->rx_ring_packets = 1386 malloc(E1000_RX_PACKETS_COUNT * sizeof(packet_t *)); 1387 // FIXME: Check return value 1395 1388 1396 1389 /* Write descriptor */ 1397 for (i = 0; i < E1000_RX_FRAME_COUNT; i++) 1398 e1000_fill_new_rx_descriptor(nic, i); 1390 for (unsigned int offset = 0; 1391 offset < E1000_RX_PACKETS_COUNT; 1392 offset++) 1393 e1000_fill_new_rx_descriptor(nic, offset); 1399 1394 1400 1395 e1000_initialize_rx_registers(e1000); … … 1402 1397 fibril_mutex_unlock(&e1000->rx_lock); 1403 1398 return EOK; 1404 error:1405 for (i = 0; i < E1000_RX_FRAME_COUNT; i++) {1406 if (e1000->rx_frame_virt[i] != NULL) {1407 dmamem_unmap_anonymous(e1000->rx_frame_virt[i]);1408 e1000->rx_frame_virt[i] = NULL;1409 e1000->rx_frame_phys[i] = NULL;1410 }1411 }1412 if (e1000->rx_frame_phys != NULL) {1413 free(e1000->rx_frame_phys);1414 e1000->rx_frame_phys = NULL;1415 }1416 if (e1000->rx_frame_virt != NULL) {1417 free(e1000->rx_frame_virt);1418 e1000->rx_frame_phys = NULL;1419 }1420 return rc;1421 1399 } 1422 1400 … … 1430 1408 e1000_t *e1000 = DRIVER_DATA_NIC(nic); 1431 1409 1432 /* Write descriptor */1433 for (unsigned int offset = 0; offset < E1000_RX_FRAME_COUNT; offset++) {1434 dmamem_unmap_anonymous(e1000->rx_frame_virt[offset]);1435 e1000->rx_frame_virt[offset] = NULL;1436 e1000->rx_frame_phys[offset] = NULL;1437 }1438 1439 free(e1000->rx_frame_virt);1440 free(e1000->rx_frame_phys);1441 e1000->rx_frame_virt = NULL;1442 e1000->rx_frame_phys = NULL;1443 dmamem_unmap_anonymous(e1000->rx_ring_virt);1444 }1445 1446 /** Clear receive descriptor ring1447 *1448 * @param e1000 E1000 data1449 *1450 */1451 static void e1000_clear_rx_ring(e1000_t *e1000)1452 {1453 1410 /* Write descriptor */ 1454 1411 for (unsigned int offset = 0; 1455 offset < E1000_RX_FRAME_COUNT; 1412 offset < E1000_RX_PACKETS_COUNT; 1413 offset++) { 1414 packet_t *packet = *(e1000->rx_ring_packets + offset); 1415 nic_dma_unlock_packet(packet, E1000_MAX_RECEIVE_PACKET_SIZE); 1416 nic_release_packet(nic, packet); 1417 } 1418 1419 free(e1000->rx_ring_packets); 1420 dmamem_unmap_anonymous(e1000->rx_ring_virt); 1421 } 1422 1423 /** Clear receive descriptor ring 1424 * 1425 * @param e1000 E1000 data 1426 * 1427 */ 1428 static void e1000_clear_rx_ring(e1000_t *e1000) 1429 { 1430 /* Write descriptor */ 1431 for (unsigned int offset = 0; 1432 offset < E1000_RX_PACKETS_COUNT; 1456 1433 offset++) 1457 1434 e1000_clear_rx_descriptor(e1000, offset); … … 1522 1499 static void e1000_initialize_tx_registers(e1000_t *e1000) 1523 1500 { 1524 E1000_REG_WRITE(e1000, E1000_TDLEN, E1000_TX_ FRAME_COUNT * 16);1501 E1000_REG_WRITE(e1000, E1000_TDLEN, E1000_TX_PACKETS_COUNT * 16); 1525 1502 E1000_REG_WRITE(e1000, E1000_TDH, 0); 1526 1503 E1000_REG_WRITE(e1000, E1000_TDT, 0); … … 1544 1521 static int e1000_initialize_tx_structure(e1000_t *e1000) 1545 1522 { 1546 size_t i;1547 1548 1523 fibril_mutex_lock(&e1000->tx_lock); 1549 1524 1550 e1000->tx_ring_phys = NULL;1551 e1000->tx_ring_virt = NULL;1552 e1000->tx_frame_phys = NULL;1553 e1000->tx_frame_virt = NULL;1554 1555 1525 int rc = dmamem_map_anonymous( 1556 E1000_TX_ FRAME_COUNT * sizeof(e1000_tx_descriptor_t),1526 E1000_TX_PACKETS_COUNT * sizeof(e1000_tx_descriptor_t), 1557 1527 AS_AREA_READ | AS_AREA_WRITE, 0, &e1000->tx_ring_phys, 1558 1528 &e1000->tx_ring_virt); 1559 1529 if (rc != EOK) 1560 goto error;1530 return rc; 1561 1531 1562 1532 bzero(e1000->tx_ring_virt, 1563 E1000_TX_FRAME_COUNT * sizeof(e1000_tx_descriptor_t)); 1564 1565 e1000->tx_frame_phys = calloc(E1000_TX_FRAME_COUNT, sizeof(void *)); 1566 e1000->tx_frame_virt = calloc(E1000_TX_FRAME_COUNT, sizeof(void *)); 1567 1568 if (e1000->tx_frame_phys == NULL || e1000->tx_frame_virt == NULL) { 1569 rc = ENOMEM; 1570 goto error; 1571 } 1572 1573 for (i = 0; i < E1000_TX_FRAME_COUNT; i++) { 1574 rc = dmamem_map_anonymous( 1575 E1000_MAX_SEND_FRAME_SIZE, AS_AREA_READ | AS_AREA_WRITE, 1576 0, &e1000->tx_frame_phys[i], &e1000->tx_frame_virt[i]); 1577 if (rc != EOK) 1578 goto error; 1579 } 1533 E1000_TX_PACKETS_COUNT * sizeof(e1000_tx_descriptor_t)); 1580 1534 1581 1535 E1000_REG_WRITE(e1000, E1000_TDBAH, … … 1584 1538 (uint32_t) PTR_TO_U64(e1000->tx_ring_phys)); 1585 1539 1540 e1000->tx_ring_packets = 1541 malloc(E1000_TX_PACKETS_COUNT * sizeof(packet_t *)); 1542 // FIXME: Check return value 1543 1586 1544 e1000_initialize_tx_registers(e1000); 1587 1545 1588 1546 fibril_mutex_unlock(&e1000->tx_lock); 1589 1547 return EOK; 1590 1591 error:1592 if (e1000->tx_ring_virt != NULL) {1593 dmamem_unmap_anonymous(e1000->tx_ring_virt);1594 e1000->tx_ring_virt = NULL;1595 }1596 1597 if (e1000->tx_frame_phys != NULL && e1000->tx_frame_virt != NULL) {1598 for (i = 0; i < E1000_TX_FRAME_COUNT; i++) {1599 if (e1000->tx_frame_virt[i] != NULL) {1600 dmamem_unmap_anonymous(e1000->tx_frame_virt[i]);1601 e1000->tx_frame_virt[i] = NULL;1602 e1000->tx_frame_phys[i] = NULL;1603 }1604 }1605 }1606 1607 if (e1000->tx_frame_phys != NULL) {1608 free(e1000->tx_frame_phys);1609 e1000->tx_frame_phys = NULL;1610 }1611 1612 if (e1000->tx_frame_virt != NULL) {1613 free(e1000->tx_frame_virt);1614 e1000->tx_frame_phys = NULL;1615 }1616 1617 return rc;1618 1548 } 1619 1549 … … 1625 1555 static void e1000_uninitialize_tx_structure(e1000_t *e1000) 1626 1556 { 1627 size_t i; 1628 1629 for (i = 0; i < E1000_TX_FRAME_COUNT; i++) { 1630 dmamem_unmap_anonymous(e1000->tx_frame_virt[i]); 1631 e1000->tx_frame_virt[i] = NULL; 1632 e1000->tx_frame_phys[i] = NULL; 1633 } 1634 1635 if (e1000->tx_frame_phys != NULL) { 1636 free(e1000->tx_frame_phys); 1637 e1000->tx_frame_phys = NULL; 1638 } 1639 1640 if (e1000->tx_frame_virt != NULL) { 1641 free(e1000->tx_frame_virt); 1642 e1000->tx_frame_phys = NULL; 1643 } 1557 free(e1000->tx_ring_packets); 1644 1558 dmamem_unmap_anonymous(e1000->tx_ring_virt); 1645 1559 } … … 1654 1568 /* Write descriptor */ 1655 1569 for (unsigned int offset = 0; 1656 offset < E1000_TX_ FRAME_COUNT;1570 offset < E1000_TX_PACKETS_COUNT; 1657 1571 offset++) 1658 1572 e1000_clear_tx_descriptor(nic, offset); … … 1711 1625 } 1712 1626 1713 /** Activate the device to receive and transmit frames1627 /** Activate the device to receive and transmit packets 1714 1628 * 1715 1629 * @param nic NIC driver data … … 1856 1770 1857 1771 nic_set_specific(nic, e1000); 1858 nic_set_ send_frame_handler(nic, e1000_send_frame);1772 nic_set_write_packet_handler(nic, e1000_write_packet); 1859 1773 nic_set_state_change_handlers(nic, e1000_on_activating, 1860 1774 e1000_on_down, e1000_on_stopping); … … 1974 1888 /* Allocate driver data for the device. */ 1975 1889 e1000_t *e1000 = e1000_create_dev_data(dev); 1976 if (e1000 == NULL) { 1977 ddf_msg(LVL_ERROR, "Unable to allocate device softstate"); 1890 if (e1000 == NULL) 1978 1891 return ENOMEM; 1979 }1980 1892 1981 1893 /* Obtain and fill hardware resources info */ 1982 1894 int rc = e1000_get_resource_info(dev); 1983 1895 if (rc != EOK) { 1984 ddf_msg(LVL_ERROR, "Cannot obtain hardware resources");1985 1896 e1000_dev_cleanup(dev); 1986 1897 return rc; 1987 1898 } 1988 1899 1989 uint16_t device_id;1990 1900 rc = pci_config_space_read_16(dev->parent_sess, PCI_DEVICE_ID, 1991 & device_id);1901 &e1000->device_id); 1992 1902 if (rc != EOK) { 1993 ddf_msg(LVL_ERROR, "Cannot access PCI configuration space");1994 1903 e1000_dev_cleanup(dev); 1995 1904 return rc; 1996 }1997 1998 e1000_board_t board;1999 switch (device_id) {2000 case 0x100e:2001 case 0x1015:2002 case 0x1016:2003 case 0x1017:2004 board = E1000_82540;2005 break;2006 case 0x1013:2007 case 0x1018:2008 case 0x1078:2009 board = E1000_82541;2010 break;2011 case 0x1076:2012 case 0x1077:2013 case 0x107c:2014 board = E1000_82541REV2;2015 break;2016 case 0x100f:2017 case 0x1011:2018 case 0x1026:2019 case 0x1027:2020 case 0x1028:2021 board = E1000_82545;2022 break;2023 case 0x1010:2024 case 0x1012:2025 case 0x101d:2026 case 0x1079:2027 case 0x107a:2028 case 0x107b:2029 board = E1000_82546;2030 break;2031 case 0x1019:2032 case 0x101a:2033 board = E1000_82547;2034 break;2035 case 0x10b9:2036 board = E1000_82572;2037 break;2038 case 0x1096:2039 board = E1000_80003ES2;2040 break;2041 default:2042 ddf_msg(LVL_ERROR, "Device not supported (%#" PRIx16 ")",2043 device_id);2044 e1000_dev_cleanup(dev);2045 return ENOTSUP;2046 }2047 2048 switch (board) {2049 case E1000_82540:2050 case E1000_82541:2051 case E1000_82541REV2:2052 case E1000_82545:2053 case E1000_82546:2054 case E1000_82572:2055 e1000->info.eerd_start = 0x01;2056 e1000->info.eerd_done = 0x10;2057 e1000->info.eerd_address_offset = 8;2058 e1000->info.eerd_data_offset = 16;2059 break;2060 case E1000_82547:2061 case E1000_80003ES2:2062 e1000->info.eerd_start = 0x01;2063 e1000->info.eerd_done = 0x02;2064 e1000->info.eerd_address_offset = 2;2065 e1000->info.eerd_data_offset = 16;2066 break;2067 1905 } 2068 1906 … … 2097 1935 int e1000_dev_add(ddf_dev_t *dev) 2098 1936 { 2099 ddf_fun_t *fun;2100 1937 assert(dev); 2101 1938 … … 2128 1965 e1000_initialize_vlan(e1000); 2129 1966 2130 fun = ddf_fun_create(nic_get_ddf_dev(nic), fun_exposed, "port0");2131 if ( fun == NULL)1967 rc = nic_register_as_ddf_fun(nic, &e1000_dev_ops); 1968 if (rc != EOK) 2132 1969 goto err_tx_structure; 2133 nic_set_ddf_fun(nic, fun);2134 fun->ops = &e1000_dev_ops;2135 fun->driver_data = nic;2136 1970 2137 1971 rc = e1000_register_int_handler(nic); 2138 1972 if (rc != EOK) 2139 goto err_ fun_create;1973 goto err_tx_structure; 2140 1974 2141 1975 rc = nic_connect_to_services(nic); … … 2160 1994 goto err_rx_structure; 2161 1995 2162 rc = ddf_fun_bind(fun);2163 if (rc != EOK)2164 goto err_fun_bind;2165 2166 rc = ddf_fun_add_to_category(fun, DEVICE_CATEGORY_NIC);2167 if (rc != EOK)2168 goto err_add_to_cat;2169 2170 1996 return EOK; 2171 1997 2172 err_add_to_cat:2173 ddf_fun_unbind(fun);2174 err_fun_bind:2175 1998 err_rx_structure: 2176 1999 e1000_uninitialize_rx_structure(nic); 2177 2000 err_irq: 2178 2001 unregister_interrupt_handler(dev, DRIVER_DATA_DEV(dev)->irq); 2179 err_fun_create:2180 ddf_fun_destroy(fun);2181 nic_set_ddf_fun(nic, NULL);2182 2002 err_tx_structure: 2183 2003 e1000_uninitialize_tx_structure(e1000); … … 2203 2023 fibril_mutex_lock(&e1000->eeprom_lock); 2204 2024 2025 uint32_t eerd_done; 2026 uint32_t eerd_address_offset; 2027 2028 switch (e1000->device_id) { 2029 case 0x107c: 2030 case 0x1013: 2031 case 0x1018: 2032 case 0x1019: 2033 case 0x101A: 2034 case 0x1076: 2035 case 0x1077: 2036 case 0x1078: 2037 case 0x10b9: 2038 /* 82541xx and 82547GI/EI */ 2039 eerd_done = EERD_DONE_82541XX_82547GI_EI; 2040 eerd_address_offset = EERD_ADDRESS_OFFSET_82541XX_82547GI_EI; 2041 break; 2042 default: 2043 eerd_done = EERD_DONE; 2044 eerd_address_offset = EERD_ADDRESS_OFFSET; 2045 break; 2046 } 2047 2205 2048 /* Write address and START bit to EERD register */ 2206 uint32_t write_data = e1000->info.eerd_start | 2207 (((uint32_t) eeprom_address) << 2208 e1000->info.eerd_address_offset); 2049 uint32_t write_data = EERD_START | 2050 (((uint32_t) eeprom_address) << eerd_address_offset); 2209 2051 E1000_REG_WRITE(e1000, E1000_EERD, write_data); 2210 2052 2211 2053 uint32_t eerd = E1000_REG_READ(e1000, E1000_EERD); 2212 while ((eerd & e 1000->info.eerd_done) == 0) {2054 while ((eerd & eerd_done) == 0) { 2213 2055 usleep(1); 2214 2056 eerd = E1000_REG_READ(e1000, E1000_EERD); … … 2217 2059 fibril_mutex_unlock(&e1000->eeprom_lock); 2218 2060 2219 return (uint16_t) (eerd >> e1000->info.eerd_data_offset);2061 return (uint16_t) (eerd >> EERD_DATA_OFFSET); 2220 2062 } 2221 2063 … … 2293 2135 } 2294 2136 2295 /** Send frame2137 /** Send packet 2296 2138 * 2297 2139 * @param nic NIC driver data structure 2298 * @param data Frame data 2299 * @param size Frame size in bytes 2140 * @param packet Packet to send 2300 2141 * 2301 2142 * @return EOK if succeed … … 2303 2144 * 2304 2145 */ 2305 static void e1000_ send_frame(nic_t *nic, void *data, size_t size)2146 static void e1000_write_packet(nic_t *nic, packet_t *packet) 2306 2147 { 2307 2148 assert(nic); … … 2321 2162 2322 2163 /* Descriptor done */ 2323 if (tx_descriptor_addr->status & TXDESCRIPTOR_STATUS_DD) 2164 if (tx_descriptor_addr->status & TXDESCRIPTOR_STATUS_DD) { 2324 2165 descriptor_available = true; 2166 packet_t *old_packet = *(e1000->tx_ring_packets + tdt); 2167 if (old_packet) { 2168 size_t old_packet_size = packet_get_data_length(old_packet); 2169 nic_dma_unlock_packet(old_packet, old_packet_size); 2170 nic_release_packet(nic, old_packet); 2171 } 2172 } 2325 2173 2326 2174 if (!descriptor_available) { 2327 /* Framelost */2175 /* Packet lost */ 2328 2176 fibril_mutex_unlock(&e1000->tx_lock); 2329 2177 return; 2330 2178 } 2331 2179 2332 memcpy(e1000->tx_frame_virt[tdt], data, size); 2333 2334 tx_descriptor_addr->phys_addr = PTR_TO_U64(e1000->tx_frame_phys[tdt]); 2335 tx_descriptor_addr->length = size; 2180 size_t packet_size = packet_get_data_length(packet); 2181 2182 void *phys; 2183 int rc = nic_dma_lock_packet(packet, packet_size, &phys); 2184 if (rc != EOK) { 2185 fibril_mutex_unlock(&e1000->tx_lock); 2186 return; 2187 } 2188 2189 *(e1000->tx_ring_packets + tdt) = packet; 2190 2191 tx_descriptor_addr->phys_addr = 2192 PTR_TO_U64(phys + packet->data_start); 2193 tx_descriptor_addr->length = packet_size; 2336 2194 2337 2195 /* … … 2354 2212 2355 2213 tdt++; 2356 if (tdt == E1000_TX_ FRAME_COUNT)2214 if (tdt == E1000_TX_PACKETS_COUNT) 2357 2215 tdt = 0; 2358 2216 … … 2370 2228 nic_driver_implement(&e1000_driver_ops, &e1000_dev_ops, 2371 2229 &e1000_nic_iface); 2372 2373 ddf_log_init(NAME, LVL_ERROR);2374 ddf_msg(LVL_NOTE, "HelenOS E1000 driver started");2375 2230 return ddf_driver_main(&e1000_driver); 2376 2231 }
Note:
See TracChangeset
for help on using the changeset viewer.