Changeset c520034 in mainline for kernel/arch/ia64/src/mm/tlb.c

Timestamp:

2011-12-31T18:19:35Z (13 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

295f658, 77c2b02, 96cd5b4

Parents:

852052d (diff), 22f0561 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Support for kernel non-identity mappings, phase I.

• identity/non-identity kernel memory split on all architectures
• low/high physical memory split on all architectures
• frame allocator understands low/high memory
• high physical memory currently unused (Phase II)
• more compact frame_t
• zone conf frames, pte_t, kernel stacks allocated from low memory
• lockless TLB-miss handlers everywhere (newly sparc64, ia64)
• preallocate PTL1 page tables for non-identity and prevent their deallocation
• hw_map() unification
• new resource allocator used for allocating kernel virtual addresses

Breakage:

• sparc64/sun4v creates too large kernel identity; not fixed because of lack of testing hw
• ppc32's tlb_refill() seems wrong as it creates too large kernel identity, but appears unused and the architecture works normally

Not implemented yet (phase II):

• allow high memory to be used for common kernel allocations

File:

• kernel/arch/ia64/src/mm/tlb.c (modified) (19 diffs)

kernel/arch/ia64/src/mm/tlb.c

@@ -52 +52 @@
 #include <arch.h>
 #include <interrupt.h>
-
-#define IO_FRAME_BASE 0xFFFFC000000
+#include <arch/legacyio.h>
 
 /** Invalidate all TLB entries. */
@@ -467 +466 @@
 }
 
+static bool is_kernel_fault(uintptr_t va)
+{
+        region_register_t rr;
+
+        rr.word = rr_read(VA2VRN(va));
+        rid_t rid = rr.map.rid;
+        return (RID2ASID(rid) == ASID_KERNEL) && (VA2VRN(va) == VRN_KERNEL);
+}
+
 /** Instruction TLB fault handler for faults with VHPT turned off.
  *
@@ -480 +488 @@
         va = istate->cr_ifa; /* faulting address */
         
-        page_table_lock(AS, true);
+        ASSERT(!is_kernel_fault(va));
+
         t = page_mapping_find(AS, va, true);
         if (t) {
@@ -488 +497 @@
                  */
                 itc_pte_copy(t);
-                page_table_unlock(AS, true);
         } else {
                 /*
                  * Forward the page fault to address space page fault handler.
                  */
-                page_table_unlock(AS, true);
                 if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) {
                         fault_if_from_uspace(istate, "Page fault at %p.",
@@ -522 +529 @@
 static int try_memmap_io_insertion(uintptr_t va, istate_t *istate)
 {
-        if ((va >= IO_OFFSET ) && (va < IO_OFFSET + (1 << IO_PAGE_WIDTH))) {
+        if ((va >= LEGACYIO_USER_BASE) && (va < LEGACYIO_USER_BASE + (1 << LEGACYIO_PAGE_WIDTH))) {
                 if (TASK) {
-                        uint64_t io_page = (va & ((1 << IO_PAGE_WIDTH) - 1)) >>
-                            USPACE_IO_PAGE_WIDTH;
+                        uint64_t io_page = (va & ((1 << LEGACYIO_PAGE_WIDTH) - 1)) >>
+                            LEGACYIO_SINGLE_PAGE_WIDTH;
                         
                         if (is_io_page_accessible(io_page)) {
                                 uint64_t page, frame;
                                 
-                                page = IO_OFFSET +
-                                    (1 << USPACE_IO_PAGE_WIDTH) * io_page;
-                                frame = IO_FRAME_BASE +
-                                    (1 << USPACE_IO_PAGE_WIDTH) * io_page;
+                                page = LEGACYIO_USER_BASE +
+                                    (1 << LEGACYIO_SINGLE_PAGE_WIDTH) * io_page;
+                                frame = LEGACYIO_PHYS_BASE +
+                                    (1 << LEGACYIO_SINGLE_PAGE_WIDTH) * io_page;
                                 
                                 tlb_entry_t entry;
@@ -547 +554 @@
                                 entry.ar = AR_READ | AR_WRITE;
                                 entry.ppn = frame >> PPN_SHIFT;
-                                entry.ps = USPACE_IO_PAGE_WIDTH;
+                                entry.ps = LEGACYIO_SINGLE_PAGE_WIDTH;
                                 
                                 dtc_mapping_insert(page, TASK->as->asid, entry);
@@ -570 +577 @@
 {
         if (istate->cr_isr.sp) {
-                /* Speculative load. Deffer the exception
-                   until a more clever approach can be used.
-                   
-                   Currently if we try to find the mapping
-                   for the speculative load while in the kernel,
-                   we might introduce a livelock because of
-                   the possibly invalid values of the address. */
+                /*
+                 * Speculative load. Deffer the exception until a more clever
+                 * approach can be used. Currently if we try to find the
+                 * mapping for the speculative load while in the kernel, we
+                 * might introduce a livelock because of the possibly invalid
+                 * values of the address.
+                 */
                 istate->cr_ipsr.ed = true;
                 return;
@@ -582 +589 @@
         
         uintptr_t va = istate->cr_ifa;  /* faulting address */
-        
-        region_register_t rr;
-        rr.word = rr_read(VA2VRN(va));
-        rid_t rid = rr.map.rid;
-        if (RID2ASID(rid) == ASID_KERNEL) {
-                if (VA2VRN(va) == VRN_KERNEL) {
+        as_t *as = AS;
+        
+        if (is_kernel_fault(va)) {
+                if (va < end_of_identity) {
                         /*
-                         * Provide KA2PA(identity) mapping for faulting piece of
-                         * kernel address space.
+                         * Create kernel identity mapping for low memory. 
                          */
                         dtlb_kernel_mapping_insert(va, KA2PA(va), false, 0);
                         return;
+                } else {
+                        as = AS_KERNEL;
                 }
         }
         
         
-        page_table_lock(AS, true);
-        pte_t *entry = page_mapping_find(AS, va, true);
+        pte_t *entry = page_mapping_find(as, va, true);
         if (entry) {
                 /*
@@ -606 +611 @@
                  */
                 dtc_pte_copy(entry);
-                page_table_unlock(AS, true);
         } else {
-                page_table_unlock(AS, true);
                 if (try_memmap_io_insertion(va, istate))
                         return;
@@ -647 +650 @@
         uintptr_t va;
         pte_t *t;
+        as_t *as = AS;
         
         va = istate->cr_ifa;  /* faulting address */
         
-        page_table_lock(AS, true);
-        t = page_mapping_find(AS, va, true);
+        if (is_kernel_fault(va))
+                as = AS_KERNEL;
+
+        t = page_mapping_find(as, va, true);
         ASSERT((t) && (t->p));
         if ((t) && (t->p) && (t->w)) {
@@ -667 +673 @@
                 }
         }
-        page_table_unlock(AS, true);
 }
 
@@ -682 +687 @@
         
         va = istate->cr_ifa;  /* faulting address */
-        
-        page_table_lock(AS, true);
+
+        ASSERT(!is_kernel_fault(va));
+        
         t = page_mapping_find(AS, va, true);
         ASSERT((t) && (t->p));
@@ -700 +706 @@
                 }
         }
-        page_table_unlock(AS, true);
 }
 
@@ -713 +718 @@
         uintptr_t va;
         pte_t *t;
+        as_t *as = AS;
         
         va = istate->cr_ifa;  /* faulting address */
         
-        page_table_lock(AS, true);
-        t = page_mapping_find(AS, va, true);
+        if (is_kernel_fault(va))
+                as = AS_KERNEL;
+
+        t = page_mapping_find(as, va, true);
         ASSERT((t) && (t->p));
         if ((t) && (t->p)) {
@@ -733 +741 @@
                 }
         }
-        page_table_unlock(AS, true);
 }
 
@@ -748 +755 @@
         
         va = istate->cr_ifa;  /* faulting address */
+
+        ASSERT(!is_kernel_fault(va));
         
         /*
          * Assume a write to a read-only page.
          */
-        page_table_lock(AS, true);
         t = page_mapping_find(AS, va, true);
         ASSERT((t) && (t->p));
@@ -761 +769 @@
                 panic_memtrap(istate, PF_ACCESS_WRITE, va, NULL);
         }
-        page_table_unlock(AS, true);
 }
 
@@ -777 +784 @@
         va = istate->cr_ifa;  /* faulting address */
         
-        page_table_lock(AS, true);
+        ASSERT(!is_kernel_fault(va));
+
         t = page_mapping_find(AS, va, true);
         ASSERT(t);
@@ -790 +798 @@
                 else
                         dtc_pte_copy(t);
-                page_table_unlock(AS, true);
         } else {
-                page_table_unlock(AS, true);
                 if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) {
                         fault_if_from_uspace(istate, "Page fault at %p.",