Changeset c59dd1a2 in mainline for kernel/arch/xen32/src/mm/frame.c

Timestamp:

2006-07-25T00:47:29Z (18 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

a0c12f5

Parents:

aecf79f

Message:

xen32 work: create identity mapping for the main memory zone,
make several dummy modifications to get to the banner

File:

• kernel/arch/xen32/src/mm/frame.c (modified) (3 diffs)

kernel/arch/xen32/src/mm/frame.c

@@ -39 +39 @@
 #include <config.h>
 #include <arch/boot/boot.h>
+#include <arch/hypercall.h>
 #include <panic.h>
 #include <debug.h>
@@ -44 +45 @@
 #include <macros.h>
 
-#include <print.h>
 #include <console/cmd.h>
 #include <console/kconsole.h>
@@ -50 +50 @@
 uintptr_t last_frame = 0;
 
+#define L1_PT_SHIFT     10
+#define L2_PT_SHIFT     0
+
+#define L1_OFFSET_MASK                  0x3ff
+#define L2_OFFSET_MASK                  0x3ff
+
+#define PFN2PTL1_OFFSET(pfn)    ((pfn >> L1_PT_SHIFT) & L1_OFFSET_MASK)
+#define PFN2PTL2_OFFSET(pfn)    ((pfn >> L2_PT_SHIFT) & L2_OFFSET_MASK)
+
+#define PAGE_MASK       (~(PAGE_SIZE - 1))
+
+#define PTE2ADDR(pte)   (pte & PAGE_MASK)
+
+#define _PAGE_PRESENT   0x001UL
+#define _PAGE_RW                0x002UL
+#define _PAGE_USER              0x004UL
+#define _PAGE_PWT               0x008UL
+#define _PAGE_PCD               0x010UL
+#define _PAGE_ACCESSED  0x020UL
+#define _PAGE_DIRTY             0x040UL
+#define _PAGE_PAT               0x080UL
+#define _PAGE_PSE               0x080UL
+#define _PAGE_GLOBAL    0x100UL
+
+#define L1_PROT (_PAGE_PRESENT | _PAGE_ACCESSED)
+#define L2_PROT (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED)
+
 void frame_arch_init(void)
 {
         if (config.cpu_active == 1) {
+                /* The only memory zone starts just after page table */
                 pfn_t start = ADDR2PFN(ALIGN_UP(KA2PA(start_info.pt_base), PAGE_SIZE)) + start_info.nr_pt_frames;
                 size_t size = start_info.nr_pages - start;
+                
+                /* Create identity mapping */
+                pfn_t phys;
+                for (phys = start; phys < start + size; phys++) {
+                        mmu_update_t updates[1];
+                        pfn_t virt = ADDR2PFN(PA2KA(PFN2ADDR(phys)));
+                        
+                        size_t ptl1_offset = PFN2PTL1_OFFSET(virt);
+                        size_t ptl2_offset = PFN2PTL2_OFFSET(virt);
+                        
+                        unsigned long *ptl2_base = (unsigned long *) PTE2ADDR(start_info.pt_base[ptl1_offset]);
+                        
+                        if (ptl2_base == 0) {
+                                mmuext_op_t mmu_ext;
+                                
+                                pfn_t virt2 = ADDR2PFN(PA2KA(PFN2ADDR(start)));
+                                
+                                /* New L1 page table entry needed */
+                                memsetb(PFN2ADDR(virt2), PAGE_SIZE, 0);
+                                
+                                size_t ptl1_offset2 = PFN2PTL1_OFFSET(virt2);
+                                size_t ptl2_offset2 = PFN2PTL2_OFFSET(virt2);
+                                unsigned long *ptl2_base2 = (unsigned long *) PTE2ADDR(start_info.pt_base[ptl1_offset2]);
+                                
+                                if (ptl2_base2 == 0)
+                                        panic("Unable to find page table reference");
+                                
+                                updates[0].ptr = (uintptr_t) &ptl2_base2[ptl2_offset2];
+                                updates[0].val = PFN2ADDR(start_info.mfn_list[start]) | L1_PROT;
+                                if (xen_mmu_update(updates, 1, NULL, DOMID_SELF) < 0)
+                                        panic("Unable to map new page table");
+                                
+                                mmu_ext.cmd = MMUEXT_PIN_L1_TABLE;
+                                mmu_ext.arg1.mfn = start_info.mfn_list[start];
+                                if (xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF) < 0)
+                                        panic("Error pinning new page table");
+                                
+                                unsigned long *ptl0 = (unsigned long *) PFN2ADDR(start_info.mfn_list[ADDR2PFN(KA2PA(start_info.pt_base))]);
+                                
+                                updates[0].ptr = (uintptr_t) &ptl0[ptl1_offset];
+                                updates[0].val = PFN2ADDR(start_info.mfn_list[start]) | L2_PROT;
+                                if (xen_mmu_update(updates, 1, NULL, DOMID_SELF) < 0)
+                                        panic("Unable to update PTE for page table");
+                                
+                                ptl2_base = (unsigned long *) PTE2ADDR(start_info.pt_base[ptl1_offset]);
+                                start++;
+                                size--;
+                        }
+                        
+                        updates[0].ptr = (uintptr_t) &ptl2_base[ptl2_offset];
+                        updates[0].val = PFN2ADDR(start_info.mfn_list[phys]) | L2_PROT;
+                        if (xen_mmu_update(updates, 1, NULL, DOMID_SELF) < 0)
+                                panic("Unable to update PTE");
+                }
                 
                 zone_create(start, size, start, 0);