Changeset c5b69a5e in mainline
- Timestamp:
- 2012-09-04T08:25:30Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- ecd1a0a
- Parents:
- 936b72e
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/src/exception.c
r936b72e rc5b69a5e 117 117 118 118 #ifdef HIGH_EXCEPTION_VECTORS 119 /** Activates use of high exception vectors addresses. */ 119 /** Activates use of high exception vectors addresses. 120 * 121 * "High vectors were introduced into some implementations of ARMv4 and are 122 * required in ARMv6 implementations. High vectors allow the exception vector 123 * locations to be moved from their normal address range 0x00000000-0x0000001C 124 * at the bottom of the 32-bit address space, to an alternative address range 125 * 0xFFFF0000-0xFFFF001C near the top of the address space. These alternative 126 * locations are known as the high vectors. 127 * 128 * Prior to ARMv6, it is IMPLEMENTATION DEFINED whether the high vectors are 129 * supported. When they are, a hardware configuration input selects whether 130 * the normal vectors or the high vectors are to be used from 131 * reset." ARM Architecture Reference Manual A2.6.11 (p. 64 in the PDF). 132 */ 120 133 static void high_vectors(void) 121 134 { 122 135 uint32_t control_reg = 0; 123 124 #if defined(PROCESSOR_armv7_a) 136 // TODO CHeck the armv6 way and implement it 137 #if defined(PROCESSOR_armv7_a) | defined(ROCESSOR_armv6) 125 138 asm volatile ( 126 139 "mrc p15, 0, %[control_reg], c1, c0" … … 137 150 control_reg |= CP15_R1_HIGH_VECTORS_BIT; 138 151 139 #if defined(PROCESSOR_armv7_a) 152 #if defined(PROCESSOR_armv7_a) | defined(ROCESSOR_armv6) 140 153 asm volatile ( 141 154 "mcr p15, 0, %[control_reg], c1, c0" … … 167 180 void exception_init(void) 168 181 { 182 // TODO check for availability of high vectors for <= armv5 169 183 #ifdef HIGH_EXCEPTION_VECTORS 170 184 high_vectors();
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