Changeset c882505 in mainline
- Timestamp:
- 2013-03-26T17:44:16Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 44b2b78
- Parents:
- 0dfa93b0
- Files:
-
- 2 deleted
- 6 edited
- 2 moved
Legend:
- Unmodified
- Added
- Removed
-
HelenOS.config
r0dfa93b0 rc882505 487 487 ! [(CONFIG_HID_IN=generic|CONFIG_HID_IN=serial)&PLATFORM=ia64&MACHINE=i460GX] CONFIG_NS16550 (y/n) 488 488 489 % Support for ARM926 on-chip UART 490 ! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)&PLATFORM=arm32&MACHINE=integratorcp] CONFIG_ARM926_UART (y/n) 491 492 % Support for BCM2835 on-chip UART 493 ! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)&PLATFORM=arm32&MACHINE=raspberrypi] CONFIG_BCM2835_UART (y/n) 489 % Support for PL011 UART 490 ! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)&PLATFORM=arm32&(MACHINE=integratorcp|MACHINE=raspberrypi)] CONFIG_PL011_UART (y/n) 494 491 495 492 % Support for Samsung S3C24XX on-chip UART … … 527 524 528 525 % Serial line input module 529 ! [CONFIG_DSRLNIN=y|(PLATFORM=arm32&MACHINE=gta02)|(PLATFORM=arm32&MACHINE=integratorcp&CONFIG_ ARM926_UART=y)|(PLATFORM=arm32&MACHINE=beaglebone&CONFIG_AM335X_UART=y)|(PLATFORM=arm32&MACHINE=beagleboardxm&CONFIG_AMDM37X_UART=y)|(PLATFORM=ia64&MACHINE=i460GX&CONFIG_NS16550=y)|(PLATFORM=ia64&MACHINE=ski)|(PLATFORM=sparc64&PROCESSOR=sun4v)|(PLATFORM=arm32&MACHINE=raspberrypi&CONFIG_BCM2835_UART=y)] CONFIG_SRLN (y)526 ! [CONFIG_DSRLNIN=y|(PLATFORM=arm32&MACHINE=gta02)|(PLATFORM=arm32&MACHINE=integratorcp&CONFIG_PL011_UART=y)|(PLATFORM=arm32&MACHINE=beaglebone&CONFIG_AM335X_UART=y)|(PLATFORM=arm32&MACHINE=beagleboardxm&CONFIG_AMDM37X_UART=y)|(PLATFORM=ia64&MACHINE=i460GX&CONFIG_NS16550=y)|(PLATFORM=ia64&MACHINE=ski)|(PLATFORM=sparc64&PROCESSOR=sun4v)|(PLATFORM=arm32&MACHINE=raspberrypi&CONFIG_PL011_UART=y)] CONFIG_SRLN (y) 530 527 531 528 % EGA support -
kernel/arch/arm32/include/arch/mach/integratorcp/integratorcp.h
r0dfa93b0 rc882505 46 46 #define ICP_IRQC_MAX_IRQ 8 47 47 #define ICP_KBD_IRQ 3 48 #define ICP_TIMER_IRQ 6 48 #define ICP_TIMER_IRQ 6 49 #define ICP_UART0_IRQ 1 49 50 50 51 /** Timer frequency */ -
kernel/arch/arm32/include/arch/mach/raspberrypi/raspberrypi.h
r0dfa93b0 rc882505 43 43 extern struct arm_machine_ops raspberrypi_machine_ops; 44 44 45 #define BCM2835_UART0_BASE_ADDRESS 0x20201000 46 45 47 #endif 46 48 -
kernel/arch/arm32/src/mach/integratorcp/integratorcp.c
r0dfa93b0 rc882505 37 37 #include <ipc/irq.h> 38 38 #include <console/chardev.h> 39 #include <genarch/drivers/pl011/pl011.h> 39 40 #include <genarch/drivers/pl050/pl050.h> 40 #include <genarch/drivers/arm926_uart/arm926_uart.h>41 41 #include <genarch/kbrd/kbrd.h> 42 42 #include <genarch/srln/srln.h> … … 61 61 icp_hw_map_t hw_map; 62 62 irq_t timer_irq; 63 arm926_uart_t uart;63 pl011_uart_t uart; 64 64 } icp; 65 65 … … 314 314 stdout_wire(fbdev); 315 315 #endif 316 #ifdef CONFIG_ARM926_UART 317 if (arm926_uart_init(&icp.uart, ARM926_UART0_IRQ, 318 ARM926_UART0_BASE_ADDRESS, sizeof(arm926_uart_regs_t))) 316 #ifdef CONFIG_PL011_UART 317 if (pl011_uart_init(&icp.uart, ICP_UART0_IRQ, ICP_UART)) 319 318 stdout_wire(&icp.uart.outdev); 320 319 #endif … … 350 349 ICP_KBD); 351 350 352 #ifdef CONFIG_ ARM926_UART351 #ifdef CONFIG_PL011_UART 353 352 srln_instance_t *srln_instance = srln_init(); 354 353 if (srln_instance) { 355 354 indev_t *sink = stdin_wire(); 356 355 indev_t *srln = srln_wire(srln_instance, sink); 357 arm926_uart_input_wire(&icp.uart, srln);358 icp_irqc_unmask(ARM926_UART0_IRQ);356 pl011_uart_input_wire(&icp.uart, srln); 357 icp_irqc_unmask(ICP_UART0_IRQ); 359 358 } 360 359 #endif -
kernel/arch/arm32/src/mach/raspberrypi/raspberrypi.c
r0dfa93b0 rc882505 36 36 #include <arch/exception.h> 37 37 #include <arch/mach/raspberrypi/raspberrypi.h> 38 #include <genarch/drivers/ bcm2835/pl011_uart.h>38 #include <genarch/drivers/pl011/pl011.h> 39 39 #include <genarch/drivers/bcm2835/irc.h> 40 40 #include <genarch/drivers/bcm2835/timer.h> … … 169 169 static void raspberrypi_output_init(void) 170 170 { 171 #ifdef CONFIG_ BCM2835_UART171 #ifdef CONFIG_PL011_UART 172 172 if (pl011_uart_init(&raspi.uart, BCM2835_UART_IRQ, 173 PL011_UART0_BASE_ADDRESS, 174 sizeof(pl011_uart_regs_t))) 173 BCM2835_UART0_BASE_ADDRESS)) 175 174 stdout_wire(&raspi.uart.outdev); 176 175 #endif -
kernel/genarch/Makefile.inc
r0dfa93b0 rc882505 91 91 endif 92 92 93 ifeq ($(CONFIG_ ARM926_UART),y)93 ifeq ($(CONFIG_PL011_UART),y) 94 94 GENARCH_SOURCES += \ 95 genarch/src/drivers/arm926_uart/arm926_uart.c 96 endif 97 98 ifeq ($(CONFIG_BCM2835_UART),y) 99 GENARCH_SOURCES += \ 100 genarch/src/drivers/bcm2835/pl011_uart.c 95 genarch/src/drivers/pl011/pl011.c 101 96 endif 102 97 -
kernel/genarch/include/genarch/drivers/pl011/pl011.h
r0dfa93b0 rc882505 32 32 /** 33 33 * @file 34 * @brief PL011 on-chip UART (PrimeCell UART, PL011)driver.34 * @brief ARM PrimeCell PL011 UART driver. 35 35 */ 36 36 37 #ifndef KERN_PL011_ UART_H_38 #define KERN_PL011_ UART_H_37 #ifndef KERN_PL011_H_ 38 #define KERN_PL011_H_ 39 39 40 40 #include <ddi/irq.h> 41 41 #include <console/chardev.h> 42 42 #include <typedefs.h> 43 44 #define PL011_UART0_BASE_ADDRESS 0x2020100045 43 46 44 /** PrimeCell UART TRM ch. 3.3 (p. 49 in the pdf) */ … … 154 152 } pl011_uart_t; 155 153 156 bool pl011_uart_init(pl011_uart_t *, inr_t, uintptr_t , size_t);154 bool pl011_uart_init(pl011_uart_t *, inr_t, uintptr_t); 157 155 void pl011_uart_input_wire(pl011_uart_t *, indev_t *); 158 156 -
kernel/genarch/src/drivers/pl011/pl011.c
r0dfa93b0 rc882505 32 32 /** 33 33 * @file 34 * @brief PL011 on-chip UART (PrimeCell UART, PL011)driver.34 * @brief ARM PrimeCell PL011 UART driver. 35 35 */ 36 36 37 #include <genarch/drivers/ bcm2835/pl011_uart.h>37 #include <genarch/drivers/pl011/pl011.h> 38 38 #include <console/chardev.h> 39 39 #include <console/console.h> … … 94 94 } 95 95 96 bool pl011_uart_init(pl011_uart_t *uart, inr_t interrupt, uintptr_t addr , size_t size)96 bool pl011_uart_init(pl011_uart_t *uart, inr_t interrupt, uintptr_t addr) 97 97 { 98 98 ASSERT(uart); 99 uart->regs = (void*)km_map(addr, size , PAGE_NOT_CACHEABLE);100 99 uart->regs = (void*)km_map(addr, sizeof(pl011_uart_regs_t), 100 PAGE_NOT_CACHEABLE); 101 101 ASSERT(uart->regs); 102 102 103 uart->regs->control = 0; 104 uart->regs->interrupt_clear = 0x7f; 105 uart->regs->int_baud_divisor = 1; 106 uart->regs->fract_baud_divisor = 40; 107 uart->regs->line_control_high = PL011_UART_CONTROLHI_FEN_FLAG | 108 (3 << PL011_UART_CONTROLHI_WLEN_SHIFT); 103 /* Disable UART */ 104 uart->regs->control &= ~ PL011_UART_CONTROL_UARTEN_FLAG; 109 105 110 /* Enable TX and RX */ 111 uart->regs->control = 0 | 106 /* Enable hw flow control */ 107 uart->regs->control |= 108 PL011_UART_CONTROL_RTSE_FLAG | 109 PL011_UART_CONTROL_CTSE_FLAG; 110 111 /* Mask all interrupts */ 112 uart->regs->interrupt_mask = 0; 113 /* Clear interrupts */ 114 uart->regs->interrupt_clear = PL011_UART_INTERRUPT_ALL; 115 /* Enable UART, TX and RX */ 116 uart->regs->control |= 112 117 PL011_UART_CONTROL_UARTEN_FLAG | 113 118 PL011_UART_CONTROL_TXE_FLAG | 114 119 PL011_UART_CONTROL_RXE_FLAG; 115 116 /* Mask all interrupts */117 uart->regs->interrupt_mask = 0;118 120 119 121 outdev_initialize("pl011_uart_dev", &uart->outdev, &pl011_uart_ops); … … 127 129 uart->irq.handler = pl011_uart_irq_handler; 128 130 uart->irq.instance = uart; 131 129 132 return true; 130 133 } … … 137 140 uart->indev = indev; 138 141 irq_register(&uart->irq); 139 /* Enable receive interrupt */ 140 uart->regs->interrupt_mask |= (PL011_UART_INTERRUPT_RX_FLAG | 141 PL011_UART_INTERRUPT_RT_FLAG); 142 /* Enable receive interrupts */ 143 uart->regs->interrupt_mask |= 144 PL011_UART_INTERRUPT_RX_FLAG | 145 PL011_UART_INTERRUPT_RT_FLAG; 142 146 } 143 147
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