Changes in / [f7bb6d1:ca62f86] in mainline
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HelenOS.config
rf7bb6d1 rca62f86 363 363 364 364 % ASID support 365 ! [PLATFORM=ia64|PLATFORM=mips32|PLATFORM=mips64|PLATFORM=ppc32|PLATFORM=sparc64 |PLATFORM=sparc32] CONFIG_ASID (y)365 ! [PLATFORM=ia64|PLATFORM=mips32|PLATFORM=mips64|PLATFORM=ppc32|PLATFORM=sparc64] CONFIG_ASID (y) 366 366 367 367 % ASID FIFO support 368 ! [PLATFORM=ia64|PLATFORM=mips32|PLATFORM=mips64|PLATFORM=ppc32|PLATFORM=sparc64 |PLATFORM=sparc32] CONFIG_ASID_FIFO (y)368 ! [PLATFORM=ia64|PLATFORM=mips32|PLATFORM=mips64|PLATFORM=ppc32|PLATFORM=sparc64] CONFIG_ASID_FIFO (y) 369 369 370 370 % OpenFirmware tree support -
boot/arch/sparc32/include/asm.h
rf7bb6d1 rca62f86 57 57 } 58 58 59 extern void jump_to_kernel(void *entry , bootinfo_t *bootinfo);59 extern void jump_to_kernel(void *entry); 60 60 61 61 #endif -
boot/arch/sparc32/src/asm.S
rf7bb6d1 rca62f86 53 53 jump_to_kernel: 54 54 set 0x80a00000, %l0 55 56 55 jmp %l0 57 56 nop -
boot/arch/sparc32/src/main.c
rf7bb6d1 rca62f86 120 120 121 121 printf("Booting the kernel ... \n"); 122 jump_to_kernel((void *) PA2KA(BOOT_OFFSET) , &bootinfo);122 jump_to_kernel((void *) PA2KA(BOOT_OFFSET)); 123 123 } 124 124 -
kernel/arch/sparc32/include/arch/arch.h
rf7bb6d1 rca62f86 1 1 /* 2 2 * Copyright (c) 2010 Martin Decky 3 * Copyright (c) 2013 Jakub Klama4 3 * All rights reserved. 5 4 * … … 39 38 #ifndef __ASM__ 40 39 41 #include <typedefs.h> 42 43 /* ASI assignments: */ 44 #define ASI_CACHEMISS 0x01 45 #define ASI_CACHECTRL 0x02 46 #define ASI_MMUREGS 0x19 47 #define ASI_MMUBYPASS 0x1c 48 49 #define TASKMAP_MAX_RECORDS 32 50 #define CPUMAP_MAX_RECORDS 32 51 52 #define BOOTINFO_TASK_NAME_BUFLEN 32 53 54 typedef struct { 55 void *addr; 56 size_t size; 57 char name[BOOTINFO_TASK_NAME_BUFLEN]; 58 } utask_t; 59 60 typedef struct { 61 size_t cnt; 62 utask_t tasks[TASKMAP_MAX_RECORDS]; 63 } bootinfo_t; 64 65 void arch_pre_main(bootinfo_t *bootinfo); 40 void arch_pre_main(void); 66 41 67 42 #endif -
kernel/arch/sparc32/include/arch/asm.h
rf7bb6d1 rca62f86 142 142 } 143 143 144 NO_TRACE static inline uint32_t asi_u32_read(int asi, uintptr_t va)145 {146 uint32_t v;147 148 asm volatile (149 "lda [%[va]] %[asi], %[v]\n"150 : [v] "=r" (v)151 : [va] "r" (va),152 [asi] "i" ((unsigned int) asi)153 );154 155 return v;156 }157 158 NO_TRACE static inline void asi_u32_write(int asi, uintptr_t va, uint32_t v)159 {160 asm volatile (161 "sta %[v], [%[va]] %[asi]\n"162 :: [v] "r" (v),163 [va] "r" (va),164 [asi] "i" ((unsigned int) asi)165 : "memory"166 );167 }168 169 144 NO_TRACE static inline void psr_write(uint32_t psr) 170 145 { -
kernel/arch/sparc32/include/arch/exception.h
rf7bb6d1 rca62f86 59 59 extern void privileged_instruction(int n, istate_t *istate); 60 60 extern void fp_disabled(int n, istate_t *istate); 61 extern void fp_exception(int n, istate_t *istate);62 extern void tag_overflow(int n, istate_t *istate);63 61 extern void division_by_zero(int n, istate_t *istate); 64 62 extern void data_access_exception(int n, istate_t *istate); 65 63 extern void data_access_error(int n, istate_t *istate); 66 extern void data_access_mmu_miss(int n, istate_t *istate);67 extern void data_store_error(int n, istate_t *istate);68 64 extern void mem_address_not_aligned(int n, istate_t *istate); 69 65 -
kernel/arch/sparc32/include/arch/mm/as.h
rf7bb6d1 rca62f86 1 1 /* 2 2 * Copyright (c) 2010 Martin Decky 3 * Copyright (c) 2013 Jakub Klama4 3 * All rights reserved. 5 4 * … … 28 27 */ 29 28 30 /** @addtogroup sparc32mm29 /** @addtogroup abs32lemm 31 30 * @{ 32 31 */ … … 34 33 */ 35 34 36 #ifndef KERN_ sparc32_AS_H_37 #define KERN_ sparc32_AS_H_35 #ifndef KERN_abs32le_AS_H_ 36 #define KERN_abs32le_AS_H_ 38 37 39 38 #define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 … … 52 51 #define as_destructor_arch(as) (as != as) 53 52 #define as_create_arch(as, flags) (as != as) 53 #define as_install_arch(as) 54 54 #define as_deinstall_arch(as) 55 55 #define as_invalidate_translation_cache(as, page, cnt) 56 57 uintptr_t as_context_table;58 56 59 57 extern void as_arch_init(void); -
kernel/arch/sparc32/include/arch/mm/asid.h
rf7bb6d1 rca62f86 27 27 */ 28 28 29 /** @addtogroup sparc32mm29 /** @addtogroup abc32lemm 30 30 * @{ 31 31 */ 32 32 33 #ifndef KERN_ sparc32_ASID_H_34 #define KERN_ sparc32_ASID_H_33 #ifndef KERN_abs32le_ASID_H_ 34 #define KERN_abs32le_ASID_H_ 35 35 36 36 #include <typedefs.h> … … 38 38 typedef uint32_t asid_t; 39 39 40 #define ASID_MAX_ARCH 255 40 #define ASID_MAX_ARCH 3 41 42 #define asid_get() (ASID_START + 1) 43 #define asid_put(asid) 41 44 42 45 #endif -
kernel/arch/sparc32/include/arch/mm/frame.h
rf7bb6d1 rca62f86 41 41 #include <typedefs.h> 42 42 43 #define PHYSMEM_START_ADDR 0x4000000044 45 43 #define BOOT_PT_ADDRESS 0x40008000 46 44 #define BOOT_PT_START_FRAME (BOOT_PT_ADDRESS >> FRAME_WIDTH) -
kernel/arch/sparc32/include/arch/mm/page.h
rf7bb6d1 rca62f86 1 1 /* 2 2 * Copyright (c) 2010 Martin Decky 3 * Copyright (c) 2013 Jakub Klama4 3 * All rights reserved. 5 4 * … … 28 27 */ 29 28 30 /** @addtogroup sparc32mm29 /** @addtogroup abs32lemm 31 30 * @{ 32 31 */ … … 34 33 */ 35 34 36 #ifndef KERN_ sparc32_PAGE_H_37 #define KERN_ sparc32_PAGE_H_35 #ifndef KERN_abs32le_PAGE_H_ 36 #define KERN_abs32le_PAGE_H_ 38 37 39 38 #include <arch/mm/frame.h> … … 46 45 #define PA2KA(x) (((uintptr_t) (x)) + UINT32_C(0x40000000)) 47 46 48 #define PTE_ET_INVALID 0 49 #define PTE_ET_DESCRIPTOR 1 50 #define PTE_ET_ENTRY 2 51 52 #define PTE_ACC_USER_RO_KERNEL_RO 0 53 #define PTE_ACC_USER_RW_KERNEL_RW 1 54 #define PTE_ACC_USER_RX_KERNEL_RX 2 55 #define PTE_ACC_USER_RWX_KERNEL_RWX 3 56 #define PTE_ACC_USER_XO_KERNEL_XO 4 57 #define PTE_ACC_USER_RO_KERNEL_RW 5 58 #define PTE_ACC_USER_NO_KERNEL_RX 6 59 #define PTE_ACC_USER_NO_KERNEL_RWX 7 47 /* 48 * This is an example of 2-level page tables (PTL1 and PTL2 are left out) 49 * on top of the generic 4-level page table interface. 50 */ 60 51 61 52 /* Number of entries in each level. */ 62 #define PTL0_ENTRIES_ARCH 25653 #define PTL0_ENTRIES_ARCH 1024 63 54 #define PTL1_ENTRIES_ARCH 0 64 #define PTL2_ENTRIES_ARCH 6465 #define PTL3_ENTRIES_ARCH 6455 #define PTL2_ENTRIES_ARCH 0 56 #define PTL3_ENTRIES_ARCH 1024 66 57 67 58 /* Page table sizes for each level. */ 68 59 #define PTL0_SIZE_ARCH ONE_FRAME 69 60 #define PTL1_SIZE_ARCH 0 70 #define PTL2_SIZE_ARCH ONE_FRAME61 #define PTL2_SIZE_ARCH 0 71 62 #define PTL3_SIZE_ARCH ONE_FRAME 72 63 73 64 /* Macros calculating indices for each level. */ 74 #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 2 4) & 0xffU)65 #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ffU) 75 66 #define PTL1_INDEX_ARCH(vaddr) 0 76 #define PTL2_INDEX_ARCH(vaddr) (((vaddr) >> 18) & 0x3fU)77 #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3f U)67 #define PTL2_INDEX_ARCH(vaddr) 0 68 #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ffU) 78 69 79 70 /* Get PTE address accessors for each level. */ … … 81 72 ((pte_t *) ((((pte_t *) (ptl0))[(i)].frame_address) << 12)) 82 73 #define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ 83 KA2PA(ptl1)74 (ptl1) 84 75 #define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ 85 ( (pte_t *) ((((pte_t *) (ptl2))[(i)].frame_address) << 12))76 (ptl2) 86 77 #define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ 87 78 ((uintptr_t) ((((pte_t *) (ptl3))[(i)].frame_address) << 12)) … … 92 83 (((pte_t *) (ptl0))[(i)].frame_address = (a) >> 12) 93 84 #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) 94 #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) \ 95 (((pte_t *) (ptl2))[(i)].frame_address = (a) >> 12) 85 #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) 96 86 #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ 97 87 (((pte_t *) (ptl3))[(i)].frame_address = (a) >> 12) … … 103 93 PAGE_PRESENT 104 94 #define GET_PTL3_FLAGS_ARCH(ptl2, i) \ 105 get_pt_flags((pte_t *) (ptl2), (size_t) (i))95 PAGE_PRESENT 106 96 #define GET_FRAME_FLAGS_ARCH(ptl3, i) \ 107 97 get_pt_flags((pte_t *) (ptl3), (size_t) (i)) 108 98 109 99 /* Set PTE flags accessors for each level. */ 110 #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) 100 #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ 101 set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x)) 111 102 #define SET_PTL2_FLAGS_ARCH(ptl1, i, x) 112 103 #define SET_PTL3_FLAGS_ARCH(ptl2, i, x) 113 104 #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ 114 set_pt e_flags((pte_t *) (ptl3), (size_t) (i), (x))105 set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) 115 106 116 107 /* Set PTE present bit accessors for each level. */ 117 108 #define SET_PTL1_PRESENT_ARCH(ptl0, i) \ 118 set_pt d_present((pte_t *) (ptl0), (size_t) (i))109 set_pt_present((pte_t *) (ptl0), (size_t) (i)) 119 110 #define SET_PTL2_PRESENT_ARCH(ptl1, i) 120 #define SET_PTL3_PRESENT_ARCH(ptl2, i) \ 121 set_ptd_present((pte_t *) (ptl2), (size_t) (i)) 111 #define SET_PTL3_PRESENT_ARCH(ptl2, i) 122 112 #define SET_FRAME_PRESENT_ARCH(ptl3, i) \ 123 set_pt e_present((pte_t *) (ptl3), (size_t) (i))113 set_pt_present((pte_t *) (ptl3), (size_t) (i)) 124 114 125 115 /* Macros for querying the last level entries. */ … … 127 117 (*((uint32_t *) (p)) != 0) 128 118 #define PTE_PRESENT_ARCH(p) \ 129 ((p)-> et != 0)119 ((p)->present != 0) 130 120 #define PTE_GET_FRAME_ARCH(p) \ 131 121 ((p)->frame_address << FRAME_WIDTH) 132 122 #define PTE_WRITABLE_ARCH(p) \ 133 pte_is_writeable(p) 134 #define PTE_EXECUTABLE_ARCH(p) \ 135 pte_is_executable(p) 123 ((p)->writeable != 0) 124 #define PTE_EXECUTABLE_ARCH(p) 1 136 125 137 126 #include <mm/mm.h> … … 139 128 #include <typedefs.h> 140 129 141 /** Page Table Descriptor. */142 typedef struct {143 unsigned int table_pointer: 30;144 unsigned int et: 2;145 } __attribute__((packed)) ptd_t;146 147 130 /** Page Table Entry. */ 148 131 typedef struct { 149 unsigned int frame_address: 24; 150 unsigned int cacheable: 1; 151 unsigned int modified: 1; 152 unsigned int referenced: 1; 153 unsigned int acc: 3; 154 unsigned int et: 2; 132 unsigned int present : 1; 133 unsigned int writeable : 1; 134 unsigned int uaccessible : 1; 135 unsigned int page_write_through : 1; 136 unsigned int page_cache_disable : 1; 137 unsigned int accessed : 1; 138 unsigned int dirty : 1; 139 unsigned int pat : 1; 140 unsigned int global : 1; 141 142 /** Valid content even if the present bit is not set. */ 143 unsigned int soft_valid : 1; 144 unsigned int avl : 2; 145 unsigned int frame_address : 20; 155 146 } __attribute__((packed)) pte_t; 156 157 NO_TRACE static inline void set_ptl0_addr(pte_t *pt)158 {159 }160 161 NO_TRACE static inline bool pte_is_writeable(pte_t *pt)162 {163 return (164 pt->acc == PTE_ACC_USER_RW_KERNEL_RW ||165 pt->acc == PTE_ACC_USER_RWX_KERNEL_RWX ||166 pt->acc == PTE_ACC_USER_RO_KERNEL_RW ||167 pt->acc == PTE_ACC_USER_NO_KERNEL_RWX168 );169 }170 171 NO_TRACE static inline bool pte_is_executable(pte_t *pt)172 {173 return (174 pt->acc != PTE_ACC_USER_RO_KERNEL_RO &&175 pt->acc != PTE_ACC_USER_RW_KERNEL_RW &&176 pt->acc != PTE_ACC_USER_RO_KERNEL_RW177 );178 }179 147 180 148 NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i) … … 182 150 { 183 151 pte_t *p = &pt[i]; 184 185 bool notpresent = p->et == 0; 186 152 187 153 return ( 188 (p->cacheable << PAGE_CACHEABLE_SHIFT) | 189 (notpresent << PAGE_PRESENT_SHIFT) | 190 ((p->acc != PTE_ACC_USER_NO_KERNEL_RX && p->acc != PTE_ACC_USER_NO_KERNEL_RWX) << PAGE_USER_SHIFT) | 191 (1 << PAGE_READ_SHIFT) | 192 (( 193 p->acc == PTE_ACC_USER_RW_KERNEL_RW || 194 p->acc == PTE_ACC_USER_RWX_KERNEL_RWX || 195 p->acc == PTE_ACC_USER_RO_KERNEL_RW || 196 p->acc == PTE_ACC_USER_NO_KERNEL_RWX 197 ) << PAGE_WRITE_SHIFT) | 198 (( 199 p->acc != PTE_ACC_USER_RO_KERNEL_RO && 200 p->acc != PTE_ACC_USER_RW_KERNEL_RW && 201 p->acc != PTE_ACC_USER_RO_KERNEL_RW 202 ) << PAGE_EXEC_SHIFT) | 203 (1 << PAGE_GLOBAL_SHIFT) 154 ((unsigned int) (!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT) | 155 ((unsigned int) (!p->present) << PAGE_PRESENT_SHIFT) | 156 ((unsigned int) p->uaccessible << PAGE_USER_SHIFT) | 157 (1 << PAGE_READ_SHIFT) | 158 ((unsigned int) p->writeable << PAGE_WRITE_SHIFT) | 159 (1 << PAGE_EXEC_SHIFT) | 160 ((unsigned int) p->global << PAGE_GLOBAL_SHIFT) 204 161 ); 205 162 } 206 163 207 NO_TRACE static inline void set_pt d_flags(pte_t *pt, size_t i, int flags)164 NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags) 208 165 WRITES(ARRAY_RANGE(pt, PTL0_ENTRIES_ARCH)) 209 166 REQUIRES_ARRAY_MUTABLE(pt, PTL0_ENTRIES_ARCH) … … 211 168 pte_t *p = &pt[i]; 212 169 213 p->et = (flags & PAGE_NOT_PRESENT) 214 ? PTE_ET_INVALID 215 : PTE_ET_DESCRIPTOR; 170 p->page_cache_disable = !(flags & PAGE_CACHEABLE); 171 p->present = !(flags & PAGE_NOT_PRESENT); 172 p->uaccessible = (flags & PAGE_USER) != 0; 173 p->writeable = (flags & PAGE_WRITE) != 0; 174 p->global = (flags & PAGE_GLOBAL) != 0; 175 176 /* 177 * Ensure that there is at least one bit set even if the present bit is 178 * cleared. 179 */ 180 p->soft_valid = true; 216 181 } 217 182 218 NO_TRACE static inline void set_pt e_flags(pte_t *pt, size_t i, int flags)183 NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) 219 184 WRITES(ARRAY_RANGE(pt, PTL0_ENTRIES_ARCH)) 220 185 REQUIRES_ARRAY_MUTABLE(pt, PTL0_ENTRIES_ARCH) … … 222 187 pte_t *p = &pt[i]; 223 188 224 p->et = PTE_ET_ENTRY; 225 p->acc = PTE_ACC_USER_NO_KERNEL_RWX; 226 227 if (flags & PAGE_USER) { 228 if (flags & PAGE_READ) 229 p->acc = PTE_ACC_USER_RO_KERNEL_RW; 230 if (flags & PAGE_WRITE) 231 p->acc = PTE_ACC_USER_RW_KERNEL_RW; 232 } 233 234 if (flags & PAGE_NOT_PRESENT) 235 p->et = PTE_ET_INVALID; 236 237 p->cacheable = (flags & PAGE_CACHEABLE) != 0; 238 } 239 240 NO_TRACE static inline void set_ptd_present(pte_t *pt, size_t i) 241 WRITES(ARRAY_RANGE(pt, PTL0_ENTRIES_ARCH)) 242 REQUIRES_ARRAY_MUTABLE(pt, PTL0_ENTRIES_ARCH) 243 { 244 pte_t *p = &pt[i]; 245 246 p->et = PTE_ET_DESCRIPTOR; 247 } 248 249 NO_TRACE static inline void set_pte_present(pte_t *pt, size_t i) 250 WRITES(ARRAY_RANGE(pt, PTL0_ENTRIES_ARCH)) 251 REQUIRES_ARRAY_MUTABLE(pt, PTL0_ENTRIES_ARCH) 252 { 253 pte_t *p = &pt[i]; 254 255 p->et = PTE_ET_ENTRY; 189 p->present = 1; 256 190 } 257 191 -
kernel/arch/sparc32/src/exception.c
rf7bb6d1 rca62f86 80 80 } 81 81 82 /** Handle fp_exception. (0x08) */83 void fp_exception(int n, istate_t *istate)84 {85 fault_if_from_uspace(istate, "%s.", __func__);86 panic_badtrap(istate, n, "%s.", __func__);87 }88 89 /** Handle tag_overflow. (0x0a) */90 void tag_overflow(int n, istate_t *istate)91 {92 fault_if_from_uspace(istate, "%s.", __func__);93 panic_badtrap(istate, n, "%s.", __func__);94 }95 96 82 /** Handle division_by_zero. (0x2a) */ 97 83 void division_by_zero(int n, istate_t *istate) … … 115 101 } 116 102 117 /** Handle data_store_error. (0x29) */118 void data_store_error(int n, istate_t *istate)119 {120 fault_if_from_uspace(istate, "%s.", __func__);121 panic_badtrap(istate, n, "%s.", __func__);122 }123 /** Handle data_access_error. (0x2c) */124 void data_access_mmu_miss(int n, istate_t *istate)125 {126 fault_if_from_uspace(istate, "%s.", __func__);127 panic_badtrap(istate, n, "%s.", __func__);128 }129 130 103 /** Handle mem_address_not_aligned. (0x7) */ 131 104 void mem_address_not_aligned(int n, istate_t *istate) -
kernel/arch/sparc32/src/mm/as.c
rf7bb6d1 rca62f86 1 1 /* 2 * Copyright (c) 201 3 Jakub Klama2 * Copyright (c) 2010 Martin Decky 3 3 * All rights reserved. 4 4 * … … 27 27 */ 28 28 29 /** @addtogroup sparc32mm29 /** @addtogroup abs32lemm 30 30 * @{ 31 31 */ 32 32 33 33 #include <mm/as.h> 34 #include <arch/arch.h>35 #include <arch/asm.h>36 34 #include <arch/mm/as.h> 37 #include <arch/mm/page.h>38 35 #include <genarch/mm/page_pt.h> 39 40 static ptd_t context_table[ASID_MAX_ARCH] __attribute__((aligned (1024)));41 36 42 37 void as_arch_init(void) 43 38 { 44 39 as_operations = &as_pt_operations; 45 as_context_table = (uintptr_t)&context_table;46 }47 48 void as_install_arch(as_t *as)49 {50 printf("as_install_arch(asid=%d)\n", as->asid);51 printf("genarch.page_table=%p\n", as->genarch.page_table);52 53 context_table[as->asid].table_pointer = (uintptr_t)as->genarch.page_table >> 6;54 context_table[as->asid].et = PTE_ET_DESCRIPTOR;55 asi_u32_write(ASI_MMUREGS, 0x200, as->asid);56 40 } 57 41 -
kernel/arch/sparc32/src/mm/frame.c
rf7bb6d1 rca62f86 48 48 //machine_get_memory_extents(&base, &size); 49 49 base = 0x40000000; 50 size = 0x 4000000;50 size = 0x2000000; 51 51 52 52 base = ALIGN_UP(base, FRAME_SIZE); -
kernel/arch/sparc32/src/mm/page.c
rf7bb6d1 rca62f86 49 49 #include <print.h> 50 50 #include <interrupt.h> 51 #include <macros.h>52 51 53 52 void page_arch_init(void) 54 53 { 55 int flags = PAGE_CACHEABLE | PAGE_EXEC; 56 page_mapping_operations = &pt_mapping_operations; 57 58 page_table_lock(AS_KERNEL, true); 59 60 /* Kernel identity mapping */ 61 //FIXME: We need to consider the possibility that 62 //identity_base > identity_size and physmem_end. 63 //This might lead to overflow if identity_size is too big. 64 for (uintptr_t cur = PHYSMEM_START_ADDR; 65 cur < min(KA2PA(config.identity_base) + 66 config.identity_size, config.physmem_end); 67 cur += FRAME_SIZE) 68 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); 69 70 71 page_table_unlock(AS_KERNEL, true); 72 as_switch(NULL, AS_KERNEL); 73 74 printf("as_context_table=0x%08x\n", as_context_table); 75 76 /* Switch MMU to new context table */ 77 asi_u32_write(ASI_MMUREGS, 0x100, KA2PA(as_context_table) >> 4); 78 79 //boot_page_table_free(); 54 if (config.cpu_active == 1) 55 page_mapping_operations = &pt_mapping_operations; 80 56 } 81 57 -
kernel/arch/sparc32/src/sparc32.c
rf7bb6d1 rca62f86 49 49 #include <syscall/syscall.h> 50 50 #include <console/console.h> 51 #include <macros.h>52 51 #include <memstr.h> 53 #include <str.h>54 52 55 53 char memcpy_from_uspace_failover_address; 56 54 char memcpy_to_uspace_failover_address; 57 55 58 void arch_pre_main( bootinfo_t *bootinfo)56 void arch_pre_main(void) 59 57 { 60 init.cnt = min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS);61 62 size_t i;63 for (i = 0; i < init.cnt; i++) {64 init.tasks[i].paddr = KA2PA(bootinfo->tasks[i].addr);65 init.tasks[i].size = bootinfo->tasks[i].size;66 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,67 bootinfo->tasks[i].name);68 }69 58 } 70 59 -
kernel/arch/sparc32/src/start.S
rf7bb6d1 rca62f86 51 51 sub %sp, 96, %sp 52 52 53 mov %o1, %i054 53 call arch_pre_main 55 54 nop -
kernel/arch/sparc32/src/trap_table.S
rf7bb6d1 rca62f86 118 118 #define TRAP(_vector, _handler) \ 119 119 .org trap_table + _vector * TRAP_ENTRY_SIZE; \ 120 mov %psr, %l0 ; \120 mov %psr, %l0 ; \ 121 121 sethi %hi(_handler), %l4 ; \ 122 jmp %l4 + %lo(_handler); \ 123 mov _vector, %l3 ; 124 125 #define INTERRUPT(_vector, _priority) \ 126 .org trap_table + _vector * TRAP_ENTRY_SIZE; \ 127 mov %psr, %l0 ; \ 128 mov _priority, %g2 ; \ 129 call exc_dispatch ; \ 130 nop ; 122 jmp %l4+%lo(_handler); \ 123 mov _vector, %l3 ; 131 124 132 125 #define BADTRAP(_vector) \ … … 136 129 .align TRAP_TABLE_SIZE 137 130 trap_table: 138 TRAP(0x0, reset_trap) 139 TRAP(0x1, instruction_access_exception) 140 TRAP(0x2, illegal_instruction) 141 TRAP(0x3, privileged_instruction) 142 TRAP(0x4, fp_disabled) 143 TRAP(0x5, window_overflow_trap) 144 TRAP(0x6, window_underflow_trap) 145 TRAP(0x7, mem_address_not_aligned) 146 TRAP(0x8, fp_exception) 147 TRAP(0x9, data_access_exception) 148 TRAP(0xa, tag_overflow) 149 BADTRAP(0xb) 150 BADTRAP(0xc) 151 BADTRAP(0xd) 152 BADTRAP(0xe) 153 BADTRAP(0xf) 154 BADTRAP(0x10) 155 INTERRUPT(0x11, 1) 156 INTERRUPT(0x12, 2) 157 INTERRUPT(0x13, 3) 158 INTERRUPT(0x14, 4) 159 INTERRUPT(0x15, 5) 160 INTERRUPT(0x16, 6) 161 INTERRUPT(0x17, 7) 162 INTERRUPT(0x18, 8) 163 INTERRUPT(0x19, 9) 164 INTERRUPT(0x1a, 10) 165 INTERRUPT(0x1b, 11) 166 INTERRUPT(0x1c, 12) 167 INTERRUPT(0x1d, 13) 168 INTERRUPT(0x1e, 14) 169 INTERRUPT(0x1f, 15) 170 TRAP(0x21, instruction_access_error) 171 BADTRAP(0x22) 172 BADTRAP(0x23) 173 BADTRAP(0x24) 174 BADTRAP(0x25) 175 BADTRAP(0x26) 176 BADTRAP(0x27) 177 BADTRAP(0x28) 178 TRAP(0x29, data_access_error) 179 TRAP(0x2a, division_by_zero) 180 TRAP(0x2b, data_store_error) 181 TRAP(0x2c, data_access_mmu_miss) 182 BADTRAP(0x2d) 183 BADTRAP(0x2e) 184 BADTRAP(0x2f) 185 BADTRAP(0x30) 186 BADTRAP(0x31) 187 BADTRAP(0x32) 188 BADTRAP(0x33) 189 BADTRAP(0x34) 190 BADTRAP(0x35) 191 BADTRAP(0x36) 192 BADTRAP(0x37) 193 BADTRAP(0x38) 194 BADTRAP(0x39) 195 BADTRAP(0x3a) 196 BADTRAP(0x3b) 197 BADTRAP(0x3c) 198 BADTRAP(0x3d) 199 BADTRAP(0x3e) 200 BADTRAP(0x3f) 201 BADTRAP(0x40) 202 BADTRAP(0x41) 203 BADTRAP(0x42) 204 BADTRAP(0x43) 205 BADTRAP(0x44) 206 BADTRAP(0x45) 207 BADTRAP(0x46) 208 BADTRAP(0x47) 209 BADTRAP(0x48) 210 BADTRAP(0x49) 211 BADTRAP(0x4a) 212 BADTRAP(0x4b) 213 BADTRAP(0x4c) 214 BADTRAP(0x4d) 215 BADTRAP(0x4e) 216 BADTRAP(0x4f) 217 BADTRAP(0x50) 218 BADTRAP(0x51) 219 BADTRAP(0x52) 220 BADTRAP(0x53) 221 BADTRAP(0x54) 222 BADTRAP(0x55) 223 BADTRAP(0x56) 224 BADTRAP(0x57) 225 BADTRAP(0x58) 226 BADTRAP(0x59) 227 BADTRAP(0x5a) 228 BADTRAP(0x5b) 229 BADTRAP(0x5c) 230 BADTRAP(0x5d) 231 BADTRAP(0x5e) 232 BADTRAP(0x5f) 233 BADTRAP(0x60) 234 BADTRAP(0x61) 235 BADTRAP(0x62) 236 BADTRAP(0x63) 237 BADTRAP(0x64) 238 BADTRAP(0x65) 239 BADTRAP(0x66) 240 BADTRAP(0x67) 241 BADTRAP(0x68) 242 BADTRAP(0x69) 243 BADTRAP(0x6a) 244 BADTRAP(0x6b) 245 BADTRAP(0x6c) 246 BADTRAP(0x6d) 247 BADTRAP(0x6e) 248 BADTRAP(0x6f) 249 BADTRAP(0x70) 250 BADTRAP(0x71) 251 BADTRAP(0x72) 252 BADTRAP(0x73) 253 BADTRAP(0x74) 254 BADTRAP(0x75) 255 BADTRAP(0x76) 256 BADTRAP(0x77) 257 BADTRAP(0x78) 258 BADTRAP(0x79) 259 BADTRAP(0x7a) 260 BADTRAP(0x7b) 261 BADTRAP(0x7c) 262 BADTRAP(0x7d) 263 BADTRAP(0x7e) 264 BADTRAP(0x7f) 265 131 TRAP(0, reset_trap) 132 BADTRAP(1) 133 TRAP(2, illegal_instruction) 134 TRAP(3, privileged_instruction) 135 TRAP(4, fp_disabled) 136 TRAP(5, window_overflow_trap) 137 TRAP(6, window_underflow_trap) 138 BADTRAP(7) 139 BADTRAP(8) 140 BADTRAP(9) 141 BADTRAP(10) 142 BADTRAP(11) 143 BADTRAP(12) 144 BADTRAP(13) 145 BADTRAP(14) 146 BADTRAP(15) 147 BADTRAP(16) 148 BADTRAP(17) 149 BADTRAP(18) 150 BADTRAP(19) 151 BADTRAP(20) 152 BADTRAP(21) 153 BADTRAP(22) 154 BADTRAP(23) 155 BADTRAP(24) 156 BADTRAP(25) 157 BADTRAP(26) 158 BADTRAP(27) 159 BADTRAP(28) 160 BADTRAP(29) 161 BADTRAP(30) 162 BADTRAP(31) 163 BADTRAP(32) 164 BADTRAP(33) 165 BADTRAP(34) 166 BADTRAP(35) 167 BADTRAP(36) 168 BADTRAP(37) 169 BADTRAP(38) 170 BADTRAP(39) 171 BADTRAP(40) 172 BADTRAP(41) 173 BADTRAP(42) 174 BADTRAP(43) 175 BADTRAP(44) 176 BADTRAP(45) 177 BADTRAP(46) 178 BADTRAP(47) 179 BADTRAP(48) 180 BADTRAP(49) 181 BADTRAP(50) 182 BADTRAP(51) 183 BADTRAP(52) 184 BADTRAP(53) 185 BADTRAP(54) 186 BADTRAP(55) 187 BADTRAP(56) 188 BADTRAP(57) 189 BADTRAP(58) 190 BADTRAP(59) 191 BADTRAP(60) 192 BADTRAP(61) 193 BADTRAP(62) 194 BADTRAP(63) 195 BADTRAP(64) 196 BADTRAP(65) 197 BADTRAP(66) 198 BADTRAP(67) 199 BADTRAP(68) 200 BADTRAP(69) 201 BADTRAP(70) 202 BADTRAP(71) 203 BADTRAP(72) 204 BADTRAP(73) 205 BADTRAP(74) 206 BADTRAP(75) 207 BADTRAP(76) 208 BADTRAP(77) 209 BADTRAP(78) 210 BADTRAP(79) 211 BADTRAP(80) 212 BADTRAP(81) 213 BADTRAP(82) 214 BADTRAP(83) 215 BADTRAP(84) 216 BADTRAP(85) 217 BADTRAP(86) 218 BADTRAP(87) 219 BADTRAP(88) 220 BADTRAP(89) 221 BADTRAP(90) 222 BADTRAP(91) 223 BADTRAP(92) 224 BADTRAP(93) 225 BADTRAP(94) 226 BADTRAP(95) 227 BADTRAP(96) 228 BADTRAP(97) 229 BADTRAP(98) 230 BADTRAP(99) 231 BADTRAP(100) 232 BADTRAP(101) 233 BADTRAP(102) 234 BADTRAP(103) 235 -
kernel/genarch/src/mm/page_pt.c
rf7bb6d1 rca62f86 77 77 unsigned int flags) 78 78 { 79 //printf("pt_mapping_insert: as=%p, page=0x%08x, frame=0x%08x\n", as, page, frame);80 81 79 pte_t *ptl0 = (pte_t *) PA2KA((uintptr_t) as->genarch.page_table); 82 80 83 //printf("ptl0 = %p\n", ptl0);84 85 81 ASSERT(page_table_locked(as)); 86 82 87 83 if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT) { 88 // printf("allocating ptl1\n");89 90 84 pte_t *newpt = (pte_t *) frame_alloc(PTL1_SIZE, 91 85 FRAME_LOWMEM | FRAME_KA); 92 93 // printf("newpt = %p, index = %d\n", newpt, PTL0_INDEX(page));94 95 86 memsetb(newpt, FRAME_SIZE << PTL1_SIZE, 0); 96 87 SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page), KA2PA(newpt)); … … 109 100 pte_t *ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page))); 110 101 111 // printf("ptl1 = %p\n", ptl1);112 113 102 if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT) { 114 // printf("allocating ptl2\n");115 116 103 pte_t *newpt = (pte_t *) frame_alloc(PTL2_SIZE, 117 104 FRAME_LOWMEM | FRAME_KA); 118 119 // printf("newpt = %p, index = %d\n", newpt, PTL1_INDEX(page));120 121 105 memsetb(newpt, FRAME_SIZE << PTL2_SIZE, 0); 122 106 SET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page), KA2PA(newpt)); … … 133 117 pte_t *ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page))); 134 118 135 // printf("ptl2 = %p\n", ptl2);136 137 119 if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT) { 138 // printf("allocating ptl3\n");139 140 120 pte_t *newpt = (pte_t *) frame_alloc(PTL3_SIZE, 141 121 FRAME_LOWMEM | FRAME_KA); 142 143 // printf("newpt = %p, index = %d\n", newpt, PTL2_INDEX(page));144 145 122 memsetb(newpt, FRAME_SIZE << PTL3_SIZE, 0); 146 123 SET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page), KA2PA(newpt)); … … 157 134 pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page))); 158 135 159 // printf("ptl3 = %p\n", ptl3);160 161 136 SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(page), frame); 162 137 SET_FRAME_FLAGS(ptl3, PTL3_INDEX(page), flags | PAGE_NOT_PRESENT); -
kernel/generic/src/proc/scheduler.c
rf7bb6d1 rca62f86 64 64 #include <stacktrace.h> 65 65 66 //#define SCHEDULER_VERBOSE 167 68 66 static void scheduler_separated_stack(void); 69 67 … … 520 518 #ifdef SCHEDULER_VERBOSE 521 519 printf("cpu%u: tid %" PRIu64 " (priority=%d, ticks=%" PRIu64 522 ", nrdy=% d)\n", CPU->id, THREAD->tid, THREAD->priority,520 ", nrdy=%ld)\n", CPU->id, THREAD->tid, THREAD->priority, 523 521 THREAD->ticks, atomic_get(&CPU->nrdy)); 524 522 #endif
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