Changeset cad5ce8 in mainline
- Timestamp:
- 2005-10-08T09:31:49Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- ac5665a
- Parents:
- 8c5e6c7
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
doc/BUGS_FOUND
r8c5e6c7 rcad5ce8 14 14 ==== 15 15 - Incorrect interpretation of lwl/lwr/swl/swr instructions 16 - Omitted excMod case in write_proc_mem() 16 17 17 18 Gcc -
test/mm/mapping1/test.c
r8c5e6c7 rcad5ce8 43 43 { 44 44 __address frame0, frame1; 45 __u32 v0, v1;45 volatile __u32 v0, v1; 46 46 47 47 printf("Memory management test mapping #1\n"); … … 70 70 printf("Writing %X to virtual address %P.\n", 0, PAGE1); 71 71 *((__u32 *) PAGE1) = 0; 72 73 v0 = *((__u32 *) PAGE0); 74 v1 = *((__u32 *) PAGE1); 72 75 73 76 printf("Value at virtual address %P is %X.\n", PAGE0, v0 = *((__u32 *) PAGE0));
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