Changeset cad5ce8 in mainline


Ignore:
Timestamp:
2005-10-08T09:31:49Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
ac5665a
Parents:
8c5e6c7
Message:

Finalize mapping1 test.
Record omitted excMod bug in msim.

Files:
2 edited

Legend:

Unmodified
Added
Removed
  • doc/BUGS_FOUND

    r8c5e6c7 rcad5ce8  
    1414====
    1515- Incorrect interpretation of lwl/lwr/swl/swr instructions
     16- Omitted excMod case in write_proc_mem()
    1617
    1718Gcc
  • test/mm/mapping1/test.c

    r8c5e6c7 rcad5ce8  
    4343{
    4444        __address frame0, frame1;
    45         __u32 v0, v1;
     45        volatile __u32 v0, v1;
    4646
    4747        printf("Memory management test mapping #1\n");
     
    7070        printf("Writing %X to virtual address %P.\n", 0, PAGE1);
    7171        *((__u32 *) PAGE1) = 0;
     72
     73        v0 = *((__u32 *) PAGE0);
     74        v1 = *((__u32 *) PAGE1);
    7275       
    7376        printf("Value at virtual address %P is %X.\n", PAGE0, v0 = *((__u32 *) PAGE0));
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