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  • kernel/arch/sparc64/src/mm/sun4u/as.c

    re08162b rcd3b380  
    6363{
    6464#ifdef CONFIG_TSB
    65         uintptr_t tsb_base = frame_alloc(TSB_FRAMES, flags, TSB_SIZE - 1);
    66         if (!tsb_base)
     65        uintptr_t tsb_phys =
     66            frame_alloc(SIZE2FRAMES((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
     67            sizeof(tsb_entry_t)), flags, 0);
     68        if (!tsb_phys)
    6769                return -1;
    68 
    69         tsb_entry_t *tsb = (tsb_entry_t *) PA2KA(tsb_base);
    70         memsetb(tsb, TSB_SIZE, 0);
     70       
     71        tsb_entry_t *tsb = (tsb_entry_t *) PA2KA(tsb_phys);
    7172       
    7273        as->arch.itsb = tsb;
    7374        as->arch.dtsb = tsb + ITSB_ENTRY_COUNT;
     75       
     76        memsetb(as->arch.itsb, (ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
     77            sizeof(tsb_entry_t), 0);
    7478#endif
    7579       
     
    8084{
    8185#ifdef CONFIG_TSB
    82         frame_free(KA2PA((uintptr_t) as->arch.itsb), TSB_FRAMES);
    83        
    84         return TSB_FRAMES;
     86        size_t frames = SIZE2FRAMES((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
     87            sizeof(tsb_entry_t));
     88        frame_free(KA2PA((uintptr_t) as->arch.itsb), frames);
     89       
     90        return frames;
    8591#else
    8692        return 0;
     
    130136        uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
    131137       
    132         ASSERT(as->arch.itsb);
    133         ASSERT(as->arch.dtsb);
     138        ASSERT(as->arch.itsb && as->arch.dtsb);
    134139       
    135140        uintptr_t tsb = (uintptr_t) as->arch.itsb;
    136141       
    137         if (!overlaps(tsb, TSB_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
     142        if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
    138143                /*
    139144                 * TSBs were allocated from memory not covered
     
    150155         *
    151156         */
    152         tsb_base_reg_t tsb_base_reg;
    153        
    154         tsb_base_reg.value = 0;
    155         tsb_base_reg.size = TSB_BASE_REG_SIZE;
    156         tsb_base_reg.split = 0;
    157        
    158         tsb_base_reg.base = ((uintptr_t) as->arch.itsb) >> MMU_PAGE_WIDTH;
    159         itsb_base_write(tsb_base_reg.value);
    160         tsb_base_reg.base = ((uintptr_t) as->arch.dtsb) >> MMU_PAGE_WIDTH;
    161         dtsb_base_write(tsb_base_reg.value);
     157        tsb_base_reg_t tsb_base;
     158       
     159        tsb_base.value = 0;
     160        tsb_base.size = TSB_SIZE;
     161        tsb_base.split = 0;
     162       
     163        tsb_base.base = ((uintptr_t) as->arch.itsb) >> MMU_PAGE_WIDTH;
     164        itsb_base_write(tsb_base.value);
     165        tsb_base.base = ((uintptr_t) as->arch.dtsb) >> MMU_PAGE_WIDTH;
     166        dtsb_base_write(tsb_base.value);
    162167       
    163168#if defined (US3)
     
    202207        uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
    203208       
    204         ASSERT(as->arch.itsb);
    205         ASSERT(as->arch.dtsb);
     209        ASSERT(as->arch.itsb && as->arch.dtsb);
    206210       
    207211        uintptr_t tsb = (uintptr_t) as->arch.itsb;
    208212       
    209         if (!overlaps(tsb, TSB_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
     213        if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
    210214                /*
    211215                 * TSBs were allocated from memory not covered
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