Changeset cf5e86e in mainline for kernel/arch/ia64/include/asm.h
- Timestamp:
- 2011-06-01T17:48:03Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 18626b3
- Parents:
- 9bd5746 (diff), 5d1b3aa (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
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- 1 edited
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kernel/arch/ia64/include/asm.h
r9bd5746 rcf5e86e 122 122 } 123 123 124 /** Return base address of current stack 125 * 126 * Return the base address of the current stack. 127 * The stack is assumed to be STACK_SIZE long. 128 * The stack must start on page boundary. 129 * 124 /** Return base address of current memory stack. 125 * 126 * The memory stack is assumed to be STACK_SIZE / 2 long. Note that there is 127 * also the RSE stack, which takes up the upper half of STACK_SIZE. 128 * The memory stack must start on page boundary. 130 129 */ 131 130 NO_TRACE static inline uintptr_t get_stack_base(void) 132 131 { 133 uint64_t v; 134 135 /* 136 * I'm not sure why but this code inlines badly 137 * in scheduler, resulting in THE shifting about 138 * 16B and causing kernel panic. 139 * 140 * asm volatile ( 141 * "and %[value] = %[mask], r12" 142 * : [value] "=r" (v) 143 * : [mask] "r" (~(STACK_SIZE - 1)) 144 * ); 145 * return v; 146 * 147 * The following code has the same semantics but 148 * inlines correctly. 149 * 150 */ 132 uint64_t value; 151 133 152 134 asm volatile ( 153 135 "mov %[value] = r12" 154 : [value] "=r" (v )155 ); 156 157 return (v & (~(STACK_SIZE- 1)));136 : [value] "=r" (value) 137 ); 138 139 return (value & (~(STACK_SIZE / 2 - 1))); 158 140 } 159 141
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