Changes in uspace/drv/audio/hdaudio/hdactl.c [09ab0a9a:cf78637] in mainline

File:

• uspace/drv/audio/hdaudio/hdactl.c (modified) (22 diffs)

uspace/drv/audio/hdaudio/hdactl.c

@@ -154 +154 @@
         errno_t rc;
 
-        ddf_msg(LVL_NOTE, "hda_corb_init()");
+        ddf_msg(LVL_DEBUG, "hda_corb_init()");
 
         /* Stop CORB if not stopped */
         ctl = hda_reg8_read(&hda->regs->corbctl);
         if ((ctl & BIT_V(uint8_t, corbctl_run)) != 0) {
-                ddf_msg(LVL_NOTE, "CORB is enabled, disabling first.");
+                ddf_msg(LVL_DEBUG, "CORB is enabled, disabling first.");
                 hda_reg8_write(&hda->regs->corbctl, ctl & ~BIT_V(uint8_t,
                     corbctl_run));
@@ -176 +176 @@
         corbsz = corbsz | selsz;
 
-        ddf_msg(LVL_NOTE, "Setting CORB Size register to 0x%x", corbsz);
+        ddf_msg(LVL_DEBUG, "Setting CORB Size register to 0x%x", corbsz);
         hda_reg8_write(&hda->regs->corbsize, corbsz);
         hda->ctl->corb_entries = hda_rb_entries(selsz);
@@ -190 +190 @@
         if (rc != EOK) {
                 hda->ctl->corb_virt = NULL;
-                ddf_msg(LVL_NOTE, "Failed allocating DMA memory for CORB");
-                goto error;
-        }
-
-        ddf_msg(LVL_NOTE, "Set CORB base registers");
+                ddf_msg(LVL_ERROR, "Failed allocating DMA memory for CORB");
+                goto error;
+        }
+
+        ddf_msg(LVL_DEBUG, "Set CORB base registers");
 
         /* Update CORB base registers */
@@ -200 +200 @@
         hda_reg32_write(&hda->regs->corbubase, UPPER32(hda->ctl->corb_phys));
 
-        ddf_msg(LVL_NOTE, "Reset CORB Read/Write pointers");
+        ddf_msg(LVL_DEBUG, "Reset CORB Read/Write pointers");
 
         /* Reset CORB Read Pointer */
@@ -206 +206 @@
             BIT_V(uint16_t, corbrp_rst));
         if (rc != EOK) {
-                ddf_msg(LVL_NOTE, "Failed resetting CORBRP");
+                ddf_msg(LVL_ERROR, "Failed resetting CORBRP");
                 goto error;
         }
@@ -215 +215 @@
         /* Start CORB */
         ctl = hda_reg8_read(&hda->regs->corbctl);
-        ddf_msg(LVL_NOTE, "CORBctl (0x%x) = 0x%x",
+        ddf_msg(LVL_DEBUG, "CORBctl (0x%x) = 0x%x",
             (unsigned)((void *)&hda->regs->corbctl - (void *)hda->regs), ctl | BIT_V(uint8_t, corbctl_run));
         hda_reg8_write(&hda->regs->corbctl, ctl | BIT_V(uint8_t, corbctl_run));
 
-        ddf_msg(LVL_NOTE, "CORB initialized");
+        ddf_msg(LVL_DEBUG, "CORB initialized");
         return EOK;
 error:
@@ -251 +251 @@
         errno_t rc;
 
-        ddf_msg(LVL_NOTE, "hda_rirb_init()");
+        ddf_msg(LVL_DEBUG, "hda_rirb_init()");
 
         /* Stop RIRB if not stopped */
         ctl = hda_reg8_read(&hda->regs->rirbctl);
         if ((ctl & BIT_V(uint8_t, rirbctl_run)) != 0) {
-                ddf_msg(LVL_NOTE, "RIRB is enabled, disabling first.");
+                ddf_msg(LVL_DEBUG, "RIRB is enabled, disabling first.");
                 hda_reg8_write(&hda->regs->corbctl, ctl & ~BIT_V(uint8_t,
                     rirbctl_run));
@@ -273 +273 @@
         rirbsz = rirbsz | (selsz << rirbsize_size_l);
 
-        ddf_msg(LVL_NOTE, "Setting RIRB Size register to 0x%x", rirbsz);
+        ddf_msg(LVL_DEBUG, "Setting RIRB Size register to 0x%x", rirbsz);
         hda_reg8_write(&hda->regs->rirbsize, rirbsz);
         hda->ctl->rirb_entries = hda_rb_entries(selsz);
@@ -287 +287 @@
         if (rc != EOK) {
                 hda->ctl->rirb_virt = NULL;
-                ddf_msg(LVL_NOTE, "Failed allocating DMA memory for RIRB");
-                goto error;
-        }
-
-        ddf_msg(LVL_NOTE, "Set RIRB base registers");
+                ddf_msg(LVL_ERROR, "Failed allocating DMA memory for RIRB");
+                goto error;
+        }
+
+        ddf_msg(LVL_DEBUG, "Set RIRB base registers");
 
         /* Update RIRB base registers */
@@ -297 +297 @@
         hda_reg32_write(&hda->regs->rirbubase, UPPER32(hda->ctl->rirb_phys));
 
-        ddf_msg(LVL_NOTE, "Reset RIRB Write pointer");
+        ddf_msg(LVL_DEBUG, "Reset RIRB Write pointer");
 
         /* Reset RIRB Write Pointer */
@@ -309 +309 @@
         /* Start RIRB and enable RIRB interrupt */
         ctl = hda_reg8_read(&hda->regs->rirbctl);
-        ddf_msg(LVL_NOTE, "RIRBctl (0x%x) = 0x%x",
+        ddf_msg(LVL_DEBUG, "RIRBctl (0x%x) = 0x%x",
             (unsigned)((void *)&hda->regs->rirbctl - (void *)hda->regs), ctl | BIT_V(uint8_t, rirbctl_run));
         hda_reg8_write(&hda->regs->rirbctl, ctl | BIT_V(uint8_t, rirbctl_run) |
             BIT_V(uint8_t, rirbctl_int));
 
-        ddf_msg(LVL_NOTE, "RIRB initialized");
+        ddf_msg(LVL_DEBUG, "RIRB initialized");
         return EOK;
 error:
@@ -479 +479 @@
 
                         if (hda->ctl->solrb_wp == hda->ctl->solrb_rp) {
-                                ddf_msg(LVL_NOTE, "hda_solrb_read() - last ditch effort process RIRB");
+                                ddf_msg(LVL_DEBUG, "hda_solrb_read() - last ditch effort process RIRB");
                                 fibril_mutex_unlock(&hda->ctl->solrb_lock);
                                 hda_ctl_process_rirb(hda->ctl);
@@ -486 +486 @@
 
                         if (hda->ctl->solrb_wp == hda->ctl->solrb_rp) {
-                                ddf_msg(LVL_NOTE, "hda_solrb_read() time out");
+                                ddf_msg(LVL_DEBUG, "hda_solrb_read() time out");
                                 fibril_mutex_unlock(&hda->ctl->solrb_lock);
                                 return ETIMEOUT;
@@ -525 +525 @@
         }
 
-        ddf_msg(LVL_NOTE, "reg 0x%zx STATESTS = 0x%x",
+        ddf_msg(LVL_DEBUG, "reg 0x%zx STATESTS = 0x%x",
             (void *)&hda->regs->statests - (void *)hda->regs,
             hda_reg16_read(&hda->regs->statests));
@@ -534 +534 @@
         hda_reg16_write(&hda->regs->statests, 0x7f);
 
-        ddf_msg(LVL_NOTE, "after clearing reg 0x%zx STATESTS = 0x%x",
+        ddf_msg(LVL_DEBUG, "after clearing reg 0x%zx STATESTS = 0x%x",
             (void *)&hda->regs->statests - (void *)hda->regs,
             hda_reg16_read(&hda->regs->statests));
@@ -540 +540 @@
         gctl = hda_reg32_read(&hda->regs->gctl);
         if ((gctl & BIT_V(uint32_t, gctl_crst)) != 0) {
-                ddf_msg(LVL_NOTE, "Controller not in reset. Resetting.");
+                ddf_msg(LVL_DEBUG, "Controller not in reset. Resetting.");
                 hda_reg32_write(&hda->regs->gctl, gctl & ~BIT_V(uint32_t, gctl_crst));
         }
 
-        ddf_msg(LVL_NOTE, "Taking controller out of reset.");
+        ddf_msg(LVL_DEBUG, "Taking controller out of reset.");
         hda_reg32_write(&hda->regs->gctl, gctl | BIT_V(uint32_t, gctl_crst));
 
@@ -552 +552 @@
                 gctl = hda_reg32_read(&hda->regs->gctl);
                 if ((gctl & BIT_V(uint32_t, gctl_crst)) != 0) {
-                        ddf_msg(LVL_NOTE, "gctl=0x%x", gctl);
+                        ddf_msg(LVL_DEBUG, "gctl=0x%x", gctl);
                         break;
                 }
 
-                ddf_msg(LVL_NOTE, "Waiting for controller to initialize.");
+                ddf_msg(LVL_DEBUG, "Waiting for controller to initialize.");
                 fibril_usleep(100 * 1000);
                 --cnt;
@@ -566 +566 @@
         }
 
-        ddf_msg(LVL_NOTE, "Controller is out of reset.");
-
-        ddf_msg(LVL_NOTE, "Read GCAP");
+        ddf_msg(LVL_DEBUG, "Controller is out of reset.");
+
+        ddf_msg(LVL_DEBUG, "Read GCAP");
         uint16_t gcap = hda_reg16_read(&hda->regs->gcap);
         ctl->ok64bit = (gcap & BIT_V(uint16_t, gcap_64ok)) != 0;
@@ -574 +574 @@
         ctl->iss = BIT_RANGE_EXTRACT(uint16_t, gcap_iss_h, gcap_iss_l, gcap);
         ctl->bss = BIT_RANGE_EXTRACT(uint16_t, gcap_bss_h, gcap_bss_l, gcap);
-        ddf_msg(LVL_NOTE, "GCAP: 0x%x (64OK=%d)", gcap, ctl->ok64bit);
-        ddf_msg(LVL_NOTE, "iss: %d, oss: %d, bss: %d\n",
+        ddf_msg(LVL_DEBUG, "GCAP: 0x%x (64OK=%d)", gcap, ctl->ok64bit);
+        ddf_msg(LVL_DEBUG, "iss: %d, oss: %d, bss: %d\n",
             ctl->iss, ctl->oss, ctl->bss);
         /* Give codecs enough time to enumerate themselves */
         fibril_usleep(codec_enum_wait_us);
 
-        ddf_msg(LVL_NOTE, "STATESTS = 0x%x",
+        ddf_msg(LVL_DEBUG, "STATESTS = 0x%x",
             hda_reg16_read(&hda->regs->statests));
 
         /* Enable interrupts */
         intctl = hda_reg32_read(&hda->regs->intctl);
-        ddf_msg(LVL_NOTE, "intctl (0x%x) := 0x%x",
+        ddf_msg(LVL_DEBUG, "intctl (0x%x) := 0x%x",
             (unsigned)((void *)&hda->regs->intctl - (void *)hda->regs),
             intctl | BIT_V(uint32_t, intctl_gie) | BIT_V(uint32_t, intctl_cie));
@@ -600 +600 @@
                 goto error;
 
-        ddf_msg(LVL_NOTE, "call hda_codec_init()");
+        ddf_msg(LVL_DEBUG, "call hda_codec_init()");
         hda->ctl->codec = hda_codec_init(hda, 0);
         if (hda->ctl->codec == NULL) {
-                ddf_msg(LVL_NOTE, "hda_codec_init() failed");
-                goto error;
-        }
-
-        ddf_msg(LVL_NOTE, "intsts=0x%x", hda_reg32_read(&hda->regs->intsts));
-        ddf_msg(LVL_NOTE, "sdesc[%d].sts=0x%x",
+                ddf_msg(LVL_DEBUG, "hda_codec_init() failed");
+                goto error;
+        }
+
+        ddf_msg(LVL_DEBUG, "intsts=0x%x", hda_reg32_read(&hda->regs->intsts));
+        ddf_msg(LVL_DEBUG, "sdesc[%d].sts=0x%x",
             hda->ctl->iss, hda_reg8_read(&hda->regs->sdesc[hda->ctl->iss].sts));
 
@@ -622 +622 @@
 void hda_ctl_fini(hda_ctl_t *ctl)
 {
-        ddf_msg(LVL_NOTE, "hda_ctl_fini()");
+        ddf_msg(LVL_DEBUG, "hda_ctl_fini()");
         hda_rirb_fini(ctl->hda);
         hda_corb_fini(ctl->hda);
@@ -677 +677 @@
 void hda_ctl_dump_info(hda_ctl_t *ctl)
 {
-        ddf_msg(LVL_NOTE, "corbwp=%d, corbrp=%d",
+        ddf_msg(LVL_DEBUG, "corbwp=%d, corbrp=%d",
             hda_reg16_read(&ctl->hda->regs->corbwp),
             hda_reg16_read(&ctl->hda->regs->corbrp));
-        ddf_msg(LVL_NOTE, "corbctl=0x%x, corbsts=0x%x",
+        ddf_msg(LVL_DEBUG, "corbctl=0x%x, corbsts=0x%x",
             hda_reg8_read(&ctl->hda->regs->corbctl),
             hda_reg8_read(&ctl->hda->regs->corbsts));
-        ddf_msg(LVL_NOTE, "rirbwp=0x%x, soft-rirbrp=0x%zx",
+        ddf_msg(LVL_DEBUG, "rirbwp=0x%x, soft-rirbrp=0x%zx",
             hda_reg16_read(&ctl->hda->regs->rirbwp),
             ctl->rirb_rp);
-        ddf_msg(LVL_NOTE, "solrb_wp=0x%zx, solrb_rp=0x%zx",
+        ddf_msg(LVL_DEBUG, "solrb_wp=0x%zx, solrb_rp=0x%zx",
             ctl->solrb_wp, ctl->solrb_wp);
 }