Changeset d0cf9de in mainline
- Timestamp:
- 2006-03-12T20:43:20Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 2cc5e050
- Parents:
- 9295b0cf
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia64/include/mm/frame.h
r9295b0cf rd0cf9de 30 30 #define __ia64_FRAME_H__ 31 31 32 #define FRAME_WIDTH 14 /* 64K */32 #define FRAME_WIDTH 14 /* 16K */ 33 33 #define FRAME_SIZE (1<<FRAME_WIDTH) 34 34 -
arch/ia64/include/mm/memory_init.h
r9295b0cf rd0cf9de 32 32 #include <config.h> 33 33 34 #define get_memory_size() ( 512*1024*1024) /* 512M */34 #define get_memory_size() (32*1024*1024) /* 512M */ 35 35 36 36 #endif -
arch/ia64/src/mm/tlb.c
r9295b0cf rd0cf9de 45 45 #include <arch.h> 46 46 47 48 47 49 /** Invalidate all TLB entries. */ 48 50 void tlb_invalidate_all(void) … … 92 94 } 93 95 94 95 void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt) 96 { 96 extern void d(void); 97 void d(void) 98 { 99 } 100 101 102 void tlb_invalidate_pages(asid_t asid, __address va, count_t cnt) 103 { 104 105 106 region_register rr; 107 bool restore_rr = false; 108 int b=0; 109 int c=cnt; 110 int i; 111 112 rr.word = rr_read(VA2VRN(va)); 113 if ((restore_rr = (rr.map.rid != ASID2RID(asid, VA2VRN(va))))) { 114 /* 115 * The selected region register does not contain required RID. 116 * Save the old content of the register and replace the RID. 117 */ 118 region_register rr0; 119 120 rr0 = rr; 121 rr0.map.rid = ASID2RID(asid, VA2VRN(va)); 122 rr_write(VA2VRN(va), rr0.word); 123 srlz_d(); 124 srlz_i(); 125 } 126 127 while(c>>=1) b++; 128 b>>=1; 129 __u64 ps; 130 131 switch(b) 132 { 133 case 0: /*cnt 1-3*/ 134 { 135 ps=PAGE_WIDTH; 136 break; 137 } 138 case 1: /*cnt 4-15*/ 139 { 140 cnt=(cnt/4)+1; 141 ps=PAGE_WIDTH+2; 142 va&=~((1<<ps)-1); 143 break; 144 } 145 case 2: /*cnt 16-63*/ 146 { 147 cnt=(cnt/16)+1; 148 ps=PAGE_WIDTH+4; 149 va&=~((1<<ps)-1); 150 break; 151 } 152 case 3: /*cnt 64-255*/ 153 { 154 cnt=(cnt/64)+1; 155 ps=PAGE_WIDTH+6; 156 va&=~((1<<ps)-1); 157 break; 158 } 159 case 4: /*cnt 256-1023*/ 160 { 161 cnt=(cnt/256)+1; 162 ps=PAGE_WIDTH+8; 163 va&=~((1<<ps)-1); 164 break; 165 } 166 case 5: /*cnt 1024-4095*/ 167 { 168 cnt=(cnt/1024)+1; 169 ps=PAGE_WIDTH+10; 170 va&=~((1<<ps)-1); 171 break; 172 } 173 case 6: /*cnt 4096-16383*/ 174 { 175 cnt=(cnt/4096)+1; 176 ps=PAGE_WIDTH+12; 177 va&=~((1<<ps)-1); 178 break; 179 } 180 case 7: /*cnt 16384-65535*/ 181 case 8: /*cnt 65536-(256K-1)*/ 182 { 183 cnt=(cnt/16384)+1; 184 ps=PAGE_WIDTH+14; 185 va&=~((1<<ps)-1); 186 break; 187 } 188 default: 189 { 190 cnt=(cnt/(16384*16))+1; 191 ps=PAGE_WIDTH+18; 192 va&=~((1<<ps)-1); 193 break; 194 } 195 196 } 197 d(); 198 for(i=0;i<cnt;i++) { 199 __asm__ volatile 200 ( 201 "ptc.l %0,%1;;" 202 : 203 : "r"(va), "r"(ps<<2) 204 ); 205 va+=(1<<ps); 206 } 207 srlz_d(); 208 srlz_i(); 209 210 211 if (restore_rr) { 212 rr_write(VA2VRN(va), rr.word); 213 srlz_d(); 214 srlz_i(); 215 } 97 216 98 217 -
test/mm/purge1/test.c
r9295b0cf rd0cf9de 38 38 39 39 extern void tlb_invalidate_all(void); 40 41 40 extern void tlb_invalidate_pages(asid_t asid, __address va, count_t cnt); 42 41 void test(void) 43 42 { … … 73 72 74 73 75 for(i=0;i< 256;i++)74 for(i=0;i<100;i++) 76 75 { 77 76 itc_mapping_insert(0+i*(1<<PAGE_WIDTH),8,entryi); … … 79 78 } 80 79 80 81 tlb_invalidate_pages(8,0x18000,13); 81 82 82 tlb_invalidate_all();83 /*tlb_invalidate_all();*/ 83 84 84 85 }
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