Changeset d18ad61 in mainline
- Timestamp:
- 2013-12-28T21:15:59Z (11 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- ceb5757
- Parents:
- 41b735f3
- Location:
- kernel/arch/sparc32
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc32/Makefile.inc
r41b735f3 rd18ad61 37 37 arch/$(KARCH)/src/context.S \ 38 38 arch/$(KARCH)/src/debug/stacktrace.c \ 39 arch/$(KARCH)/src/debug/stacktrace_asm.S \40 39 arch/$(KARCH)/src/proc/scheduler.c \ 41 40 arch/$(KARCH)/src/proc/task.c \ -
kernel/arch/sparc32/include/arch/mm/page.h
r41b735f3 rd18ad61 45 45 #define PAGE_SIZE FRAME_SIZE 46 46 47 #define FRAME_LOWPRIO 0 48 47 49 #define KA2PA(x) (((uintptr_t) (x)) - UINT32_C(0x40000000)) 48 50 #define PA2KA(x) (((uintptr_t) (x)) + UINT32_C(0x40000000)) … … 68 70 69 71 /* Page table sizes for each level. */ 70 #define PTL0_ SIZE_ARCH ONE_FRAME71 #define PTL1_ SIZE_ARCH 072 #define PTL2_ SIZE_ARCH ONE_FRAME73 #define PTL3_ SIZE_ARCH ONE_FRAME72 #define PTL0_FRAMES_ARCH 1 73 #define PTL1_FRAMES_ARCH 0 74 #define PTL2_FRAMES_ARCH 1 75 #define PTL3_FRAMES_ARCH 1 74 76 75 77 /* Macros calculating indices for each level. */ -
kernel/arch/sparc32/src/debug/stacktrace.c
r41b735f3 rd18ad61 51 51 { 52 52 uintptr_t kstack; 53 uint32_t l1 53 uint32_t l1; 54 54 uint32_t l2; 55 55 -
kernel/arch/sparc32/src/mm/as.c
r41b735f3 rd18ad61 38 38 #include <genarch/mm/page_pt.h> 39 39 40 uintptr_t as_context_table; 41 40 42 static ptd_t context_table[ASID_MAX_ARCH] __attribute__((aligned(1024))); 41 43 -
kernel/arch/sparc32/src/sparc32.c
r41b735f3 rd18ad61 53 53 #include <str.h> 54 54 55 staticchar memcpy_from_uspace_failover_address;56 staticchar memcpy_to_uspace_failover_address;55 char memcpy_from_uspace_failover_address; 56 char memcpy_to_uspace_failover_address; 57 57 static bootinfo_t machine_bootinfo; 58 58
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