Changeset d2e0a8cb in mainline
- Timestamp:
- 2007-11-25T10:04:38Z (17 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- be815bc
- Parents:
- b3cd9eb
- Location:
- kernel/generic
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/generic/include/ipc/irq.h
rb3cd9eb rd2e0a8cb 47 47 unative_t method, irq_code_t *ucode); 48 48 extern void ipc_irq_send_notif(irq_t *irq); 49 extern void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2,50 unative_t a3);51 49 extern void ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno); 52 50 extern void ipc_irq_cleanup(answerbox_t *box); 51 52 /* 53 * User friendly wrappers for ipc_irq_send_msg(). They are in the form 54 * ipc_irq_send_msg_m(), where m is the number of payload arguments. 55 */ 56 #define ipc_irq_send_msg_1(irq, a1) \ 57 ipc_irq_send_msg((irq), (a1), 0, 0, 0, 0) 58 #define ipc_irq_send_msg_2(irq, a1, a2) \ 59 ipc_irq_send_msg((irq), (a1), (a2), 0, 0, 0) 60 #define ipc_irq_send_msg_3(irq, a1, a2, a3) \ 61 ipc_irq_send_msg((irq), (a1), (a2), (a3), 0, 0) 62 #define ipc_irq_send_msg_4(irq, a1, a2, a3, a4) \ 63 ipc_irq_send_msg((irq), (a1), (a2), (a3), (a4), 0) 64 #define ipc_irq_send_msg_5(irq, a1, a2, a3, a4, a5) \ 65 ipc_irq_send_msg((irq), (a1), (a2), (a3), (a4), (a5)) 66 67 extern void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2, 68 unative_t a3, unative_t a4, unative_t a5); 53 69 54 70 #endif -
kernel/generic/src/console/klog.c
rb3cd9eb rd2e0a8cb 130 130 goto out; 131 131 } 132 ipc_irq_send_msg (&klog_irq, klogpos, ret, 0);132 ipc_irq_send_msg_2(&klog_irq, klogpos, ret); 133 133 klogpos += ret; 134 134 if (klogpos >= klogsize) -
kernel/generic/src/ipc/irq.c
rb3cd9eb rd2e0a8cb 90 90 break; 91 91 case CMD_MEM_WRITE_2: 92 *((uint16_t *) code->cmds[i].addr) = code->cmds[i].value; 92 *((uint16_t *) code->cmds[i].addr) = 93 code->cmds[i].value; 93 94 break; 94 95 case CMD_MEM_WRITE_4: 95 *((uint32_t *) code->cmds[i].addr) = code->cmds[i].value; 96 *((uint32_t *) code->cmds[i].addr) = 97 code->cmds[i].value; 96 98 break; 97 99 case CMD_MEM_WRITE_8: 98 *((uint64_t *) code->cmds[i].addr) = code->cmds[i].value; 100 *((uint64_t *) code->cmds[i].addr) = 101 code->cmds[i].value; 99 102 break; 100 103 #if defined(ia32) || defined(amd64) … … 119 122 break; 120 123 } 121 if (code->cmds[i].dstarg && code->cmds[i].dstarg < 4) { 124 if (code->cmds[i].dstarg && code->cmds[i].dstarg < 125 IPC_CALL_LEN) { 122 126 call->data.args[code->cmds[i].dstarg] = dstval; 123 127 } … … 283 287 * @param a2 Driver-specific payload argument. 284 288 * @param a3 Driver-specific payload argument. 285 */ 286 void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2, unative_t a3) 289 * @param a4 Driver-specific payload argument. 290 * @param a5 Driver-specific payload argument. 291 */ 292 void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2, unative_t a3, 293 unative_t a4, unative_t a5) 287 294 { 288 295 call_t *call; … … 301 308 IPC_SET_ARG2(call->data, a2); 302 309 IPC_SET_ARG3(call->data, a3); 310 IPC_SET_ARG4(call->data, a4); 311 IPC_SET_ARG5(call->data, a5); 303 312 /* Put a counter to the message */ 304 313 call->priv = ++irq->notif_cfg.counter;
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