Changeset d5a89a3 in mainline for kernel/arch/sparc64/include/arch/mm/sun4u/tlb.h

Timestamp:

2019-02-11T22:31:04Z (6 years ago)

Author:

Matthieu Riolo <matthieu.riolo@…>

Children:

aaf9789c

Parents:

e3272101 (diff), 4805495 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

merging with upstream/master

File:

• kernel/arch/sparc64/include/arch/mm/sun4u/tlb.h (modified) (33 diffs)

kernel/arch/sparc64/include/arch/mm/sun4u/tlb.h

@@ -243 +243 @@
  * Determine the number of entries in the DMMU's small TLB.
  */
-NO_TRACE static inline uint16_t tlb_dsmall_size(void)
+_NO_TRACE static inline uint16_t tlb_dsmall_size(void)
 {
         return 16;
@@ -251 +251 @@
  * Determine the number of entries in each DMMU's big TLB.
  */
-NO_TRACE static inline uint16_t tlb_dbig_size(void)
+_NO_TRACE static inline uint16_t tlb_dbig_size(void)
 {
         return 512;
@@ -259 +259 @@
  * Determine the number of entries in the IMMU's small TLB.
  */
-NO_TRACE static inline uint16_t tlb_ismall_size(void)
+_NO_TRACE static inline uint16_t tlb_ismall_size(void)
 {
         return 16;
@@ -267 +267 @@
  * Determine the number of entries in the IMMU's big TLB.
  */
-NO_TRACE static inline uint16_t tlb_ibig_size(void)
+_NO_TRACE static inline uint16_t tlb_ibig_size(void)
 {
         if (((ver_reg_t) ver_read()).impl == IMPL_ULTRASPARCIV_PLUS)
@@ -281 +281 @@
  * @return              Current value of Primary Context Register.
  */
-NO_TRACE static inline uint64_t mmu_primary_context_read(void)
+_NO_TRACE static inline uint64_t mmu_primary_context_read(void)
 {
         return asi_u64_read(ASI_DMMU, VA_PRIMARY_CONTEXT_REG);
@@ -290 +290 @@
  * @param v             New value of Primary Context Register.
  */
-NO_TRACE static inline void mmu_primary_context_write(uint64_t v)
+_NO_TRACE static inline void mmu_primary_context_write(uint64_t v)
 {
         asi_u64_write(ASI_DMMU, VA_PRIMARY_CONTEXT_REG, v);
@@ -300 +300 @@
  * @return              Current value of Secondary Context Register.
  */
-NO_TRACE static inline uint64_t mmu_secondary_context_read(void)
+_NO_TRACE static inline uint64_t mmu_secondary_context_read(void)
 {
         return asi_u64_read(ASI_DMMU, VA_SECONDARY_CONTEXT_REG);
@@ -309 +309 @@
  * @param v             New value of Primary Context Register.
  */
-NO_TRACE static inline void mmu_secondary_context_write(uint64_t v)
+_NO_TRACE static inline void mmu_secondary_context_write(uint64_t v)
 {
         asi_u64_write(ASI_DMMU, VA_SECONDARY_CONTEXT_REG, v);
@@ -324 +324 @@
  *                      Register.
  */
-NO_TRACE static inline uint64_t itlb_data_access_read(size_t entry)
+_NO_TRACE static inline uint64_t itlb_data_access_read(size_t entry)
 {
         itlb_data_access_addr_t reg;
@@ -338 +338 @@
  * @param value         Value to be written.
  */
-NO_TRACE static inline void itlb_data_access_write(size_t entry, uint64_t value)
+_NO_TRACE static inline void itlb_data_access_write(size_t entry, uint64_t value)
 {
         itlb_data_access_addr_t reg;
@@ -355 +355 @@
  *                      Register.
  */
-NO_TRACE static inline uint64_t dtlb_data_access_read(size_t entry)
+_NO_TRACE static inline uint64_t dtlb_data_access_read(size_t entry)
 {
         dtlb_data_access_addr_t reg;
@@ -369 +369 @@
  * @param value         Value to be written.
  */
-NO_TRACE static inline void dtlb_data_access_write(size_t entry, uint64_t value)
+_NO_TRACE static inline void dtlb_data_access_write(size_t entry, uint64_t value)
 {
         dtlb_data_access_addr_t reg;
@@ -385 +385 @@
  * @return              Current value of specified IMMU TLB Tag Read Register.
  */
-NO_TRACE static inline uint64_t itlb_tag_read_read(size_t entry)
+_NO_TRACE static inline uint64_t itlb_tag_read_read(size_t entry)
 {
         itlb_tag_read_addr_t tag;
@@ -400 +400 @@
  * @return              Current value of specified DMMU TLB Tag Read Register.
  */
-NO_TRACE static inline uint64_t dtlb_tag_read_read(size_t entry)
+_NO_TRACE static inline uint64_t dtlb_tag_read_read(size_t entry)
 {
         dtlb_tag_read_addr_t tag;
@@ -419 +419 @@
  *                      Register.
  */
-NO_TRACE static inline uint64_t itlb_data_access_read(int tlb, size_t entry)
+_NO_TRACE static inline uint64_t itlb_data_access_read(int tlb, size_t entry)
 {
         itlb_data_access_addr_t reg;
@@ -434 +434 @@
  * @param value         Value to be written.
  */
-NO_TRACE static inline void itlb_data_access_write(int tlb, size_t entry,
+_NO_TRACE static inline void itlb_data_access_write(int tlb, size_t entry,
     uint64_t value)
 {
@@ -454 +454 @@
  *                      Register.
  */
-NO_TRACE static inline uint64_t dtlb_data_access_read(int tlb, size_t entry)
+_NO_TRACE static inline uint64_t dtlb_data_access_read(int tlb, size_t entry)
 {
         dtlb_data_access_addr_t reg;
@@ -470 +470 @@
  * @param value         Value to be written.
  */
-NO_TRACE static inline void dtlb_data_access_write(int tlb, size_t entry,
+_NO_TRACE static inline void dtlb_data_access_write(int tlb, size_t entry,
     uint64_t value)
 {
@@ -489 +489 @@
  * @return              Current value of specified IMMU TLB Tag Read Register.
  */
-NO_TRACE static inline uint64_t itlb_tag_read_read(int tlb, size_t entry)
+_NO_TRACE static inline uint64_t itlb_tag_read_read(int tlb, size_t entry)
 {
         itlb_tag_read_addr_t tag;
@@ -506 +506 @@
  * @return              Current value of specified DMMU TLB Tag Read Register.
  */
-NO_TRACE static inline uint64_t dtlb_tag_read_read(int tlb, size_t entry)
+_NO_TRACE static inline uint64_t dtlb_tag_read_read(int tlb, size_t entry)
 {
         dtlb_tag_read_addr_t tag;
@@ -522 +522 @@
  * @param v             Value to be written.
  */
-NO_TRACE static inline void itlb_tag_access_write(uint64_t v)
+_NO_TRACE static inline void itlb_tag_access_write(uint64_t v)
 {
         asi_u64_write(ASI_IMMU, VA_IMMU_TAG_ACCESS, v);
@@ -532 +532 @@
  * @return              Current value of IMMU TLB Tag Access Register.
  */
-NO_TRACE static inline uint64_t itlb_tag_access_read(void)
+_NO_TRACE static inline uint64_t itlb_tag_access_read(void)
 {
         return asi_u64_read(ASI_IMMU, VA_IMMU_TAG_ACCESS);
@@ -541 +541 @@
  * @param v             Value to be written.
  */
-NO_TRACE static inline void dtlb_tag_access_write(uint64_t v)
+_NO_TRACE static inline void dtlb_tag_access_write(uint64_t v)
 {
         asi_u64_write(ASI_DMMU, VA_DMMU_TAG_ACCESS, v);
@@ -551 +551 @@
  * @return              Current value of DMMU TLB Tag Access Register.
  */
-NO_TRACE static inline uint64_t dtlb_tag_access_read(void)
+_NO_TRACE static inline uint64_t dtlb_tag_access_read(void)
 {
         return asi_u64_read(ASI_DMMU, VA_DMMU_TAG_ACCESS);
@@ -560 +560 @@
  * @param v             Value to be written.
  */
-NO_TRACE static inline void itlb_data_in_write(uint64_t v)
+_NO_TRACE static inline void itlb_data_in_write(uint64_t v)
 {
         asi_u64_write(ASI_ITLB_DATA_IN_REG, 0, v);
@@ -570 +570 @@
  * @param v             Value to be written.
  */
-NO_TRACE static inline void dtlb_data_in_write(uint64_t v)
+_NO_TRACE static inline void dtlb_data_in_write(uint64_t v)
 {
         asi_u64_write(ASI_DTLB_DATA_IN_REG, 0, v);
@@ -580 +580 @@
  * @return              Current content of I-SFSR register.
  */
-NO_TRACE static inline uint64_t itlb_sfsr_read(void)
+_NO_TRACE static inline uint64_t itlb_sfsr_read(void)
 {
         return asi_u64_read(ASI_IMMU, VA_IMMU_SFSR);
@@ -589 +589 @@
  * @param v             New value of I-SFSR register.
  */
-NO_TRACE static inline void itlb_sfsr_write(uint64_t v)
+_NO_TRACE static inline void itlb_sfsr_write(uint64_t v)
 {
         asi_u64_write(ASI_IMMU, VA_IMMU_SFSR, v);
@@ -599 +599 @@
  * @return              Current content of D-SFSR register.
  */
-NO_TRACE static inline uint64_t dtlb_sfsr_read(void)
+_NO_TRACE static inline uint64_t dtlb_sfsr_read(void)
 {
         return asi_u64_read(ASI_DMMU, VA_DMMU_SFSR);
@@ -608 +608 @@
  * @param v             New value of D-SFSR register.
  */
-NO_TRACE static inline void dtlb_sfsr_write(uint64_t v)
+_NO_TRACE static inline void dtlb_sfsr_write(uint64_t v)
 {
         asi_u64_write(ASI_DMMU, VA_DMMU_SFSR, v);
@@ -618 +618 @@
  * @return              Current content of D-SFAR register.
  */
-NO_TRACE static inline uint64_t dtlb_sfar_read(void)
+_NO_TRACE static inline uint64_t dtlb_sfar_read(void)
 {
         return asi_u64_read(ASI_DMMU, VA_DMMU_SFAR);
@@ -631 +631 @@
  * @param page          Address which is on the page to be demapped.
  */
-NO_TRACE static inline void itlb_demap(int type, int context_encoding, uintptr_t page)
+_NO_TRACE static inline void itlb_demap(int type, int context_encoding, uintptr_t page)
 {
         tlb_demap_addr_t da;
@@ -657 +657 @@
  * @param page          Address which is on the page to be demapped.
  */
-NO_TRACE static inline void dtlb_demap(int type, int context_encoding, uintptr_t page)
+_NO_TRACE static inline void dtlb_demap(int type, int context_encoding, uintptr_t page)
 {
         tlb_demap_addr_t da;