Changes in kernel/arch/ia64/src/start.S [22f0561:d75628da] in mainline
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kernel/arch/ia64/src/start.S
r22f0561 rd75628da 38 38 #define KERNEL_TRANSLATION_I 0x0010000000000661 39 39 #define KERNEL_TRANSLATION_D 0x0010000000000661 40 #define KERNEL_TRANSLATION_VIO 0x0010000000000671 41 #define KERNEL_TRANSLATION_IO 0x00100FFFFC000671 42 #define KERNEL_TRANSLATION_FW 0x00100000F0000671 40 43 41 44 .section K_TEXT_START, "ax" … … 85 88 itr.d dtr[r0] = r10 86 89 87 # Initialize DCR 90 movl r7 = 1 91 movl r8 = (VRN_KERNEL << VRN_SHIFT) | VIO_OFFSET 92 mov cr.ifa = r8 93 movl r10 = (KERNEL_TRANSLATION_VIO) 94 itr.d dtr[r7] = r10 95 96 mov r11 = cr.itir 97 movl r10 = ~0xfc 98 and r10 = r10, r11 99 movl r11 = (IO_PAGE_WIDTH << PS_SHIFT) 100 or r10 = r10, r11 101 mov cr.itir = r10 102 103 movl r7 = 2 104 movl r8 = (VRN_KERNEL << VRN_SHIFT) | IO_OFFSET 105 mov cr.ifa = r8 106 movl r10 = (KERNEL_TRANSLATION_IO) 107 itr.d dtr[r7] = r10 108 109 # Setup mapping for firmware area (also SAPIC) 110 111 mov r11 = cr.itir 112 movl r10 = ~0xfc 113 and r10 = r10, r11 114 movl r11 = (FW_PAGE_WIDTH << PS_SHIFT) 115 or r10 = r10, r11 116 mov cr.itir = r10 117 118 movl r7 = 3 119 movl r8 = (VRN_KERNEL << VRN_SHIFT) | FW_OFFSET 120 mov cr.ifa = r8 121 movl r10 = (KERNEL_TRANSLATION_FW) 122 itr.d dtr[r7] = r10 123 124 # Initialize DSR 88 125 89 126 movl r10 = (DCR_DP_MASK | DCR_DK_MASK | DCR_DX_MASK | DCR_DR_MASK | DCR_DA_MASK | DCR_DD_MASK | DCR_LC_MASK) … … 137 174 mov ar.bspstore = r8 138 175 loadrs 139 176 140 177 # 141 178 # Initialize memory stack to some sane value and allocate a scratch area … … 159 196 srlz.i 160 197 srlz.d ;; 161 198 162 199 br.call.sptk.many b0 = arch_pre_main 163 200 0:
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