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  • kernel/arch/amd64/include/asm.h

    rf77e591d rd99c1d2  
    3838#include <config.h>
    3939#include <typedefs.h>
    40 #include <arch/cpu.h>
    41 #include <trace.h>
     40
     41extern void asm_delay_loop(uint32_t t);
     42extern void asm_fake_loop(uint32_t t);
    4243
    4344/** Return base address of current stack.
     
    4849 *
    4950 */
    50 NO_TRACE static inline uintptr_t get_stack_base(void)
     51static inline uintptr_t get_stack_base(void)
    5152{
    5253        uintptr_t v;
     
    5556                "andq %%rsp, %[v]\n"
    5657                : [v] "=r" (v)
    57                 : "0" (~((uint64_t) STACK_SIZE - 1))
     58                : "0" (~((uint64_t) STACK_SIZE-1))
    5859        );
    5960       
     
    6162}
    6263
    63 NO_TRACE static inline void cpu_sleep(void)
    64 {
    65         asm volatile (
    66                 "hlt\n"
    67         );
    68 }
    69 
    70 NO_TRACE static inline void __attribute__((noreturn)) cpu_halt(void)
     64static inline void cpu_sleep(void)
     65{
     66        asm volatile ("hlt\n");
     67}
     68
     69static inline void __attribute__((noreturn)) cpu_halt(void)
    7170{
    7271        while (true) {
     
    7776}
    7877
     78
    7979/** Byte from port
    8080 *
     
    8585 *
    8686 */
    87 NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port)
     87static inline uint8_t pio_read_8(ioport8_t *port)
    8888{
    8989        uint8_t val;
     
    106106 *
    107107 */
    108 NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port)
     108static inline uint16_t pio_read_16(ioport16_t *port)
    109109{
    110110        uint16_t val;
     
    127127 *
    128128 */
    129 NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port)
     129static inline uint32_t pio_read_32(ioport32_t *port)
    130130{
    131131        uint32_t val;
     
    148148 *
    149149 */
    150 NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t val)
     150static inline void pio_write_8(ioport8_t *port, uint8_t val)
    151151{
    152152        asm volatile (
    153153                "outb %b[val], %w[port]\n"
    154                 :: [val] "a" (val),
    155                    [port] "d" (port)
     154                :: [val] "a" (val), [port] "d" (port)
    156155        );
    157156}
     
    165164 *
    166165 */
    167 NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val)
     166static inline void pio_write_16(ioport16_t *port, uint16_t val)
    168167{
    169168        asm volatile (
    170169                "outw %w[val], %w[port]\n"
    171                 :: [val] "a" (val),
    172                    [port] "d" (port)
     170                :: [val] "a" (val), [port] "d" (port)
    173171        );
    174172}
     
    182180 *
    183181 */
    184 NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val)
     182static inline void pio_write_32(ioport32_t *port, uint32_t val)
    185183{
    186184        asm volatile (
    187185                "outl %[val], %w[port]\n"
    188                 :: [val] "a" (val),
    189                    [port] "d" (port)
     186                :: [val] "a" (val), [port] "d" (port)
    190187        );
    191188}
    192189
    193190/** Swap Hidden part of GS register with visible one */
    194 NO_TRACE static inline void swapgs(void)
    195 {
    196         asm volatile (
    197                 "swapgs"
    198         );
     191static inline void swapgs(void)
     192{
     193        asm volatile("swapgs");
    199194}
    200195
     
    207202 *
    208203 */
    209 NO_TRACE static inline ipl_t interrupts_enable(void) {
     204static inline ipl_t interrupts_enable(void) {
    210205        ipl_t v;
    211206       
     
    228223 *
    229224 */
    230 NO_TRACE static inline ipl_t interrupts_disable(void) {
     225static inline ipl_t interrupts_disable(void) {
    231226        ipl_t v;
    232227       
     
    248243 *
    249244 */
    250 NO_TRACE static inline void interrupts_restore(ipl_t ipl) {
     245static inline void interrupts_restore(ipl_t ipl) {
    251246        asm volatile (
    252247                "pushq %[ipl]\n"
     
    263258 *
    264259 */
    265 NO_TRACE static inline ipl_t interrupts_read(void) {
     260static inline ipl_t interrupts_read(void) {
    266261        ipl_t v;
    267262       
     
    275270}
    276271
    277 /** Check interrupts state.
    278  *
    279  * @return True if interrupts are disabled.
    280  *
    281  */
    282 NO_TRACE static inline bool interrupts_disabled(void)
    283 {
    284         ipl_t v;
    285        
    286         asm volatile (
    287                 "pushfq\n"
    288                 "popq %[v]\n"
    289                 : [v] "=r" (v)
    290         );
    291        
    292         return ((v & RFLAGS_IF) == 0);
    293 }
    294 
    295272/** Write to MSR */
    296 NO_TRACE static inline void write_msr(uint32_t msr, uint64_t value)
     273static inline void write_msr(uint32_t msr, uint64_t value)
    297274{
    298275        asm volatile (
     
    304281}
    305282
    306 NO_TRACE static inline unative_t read_msr(uint32_t msr)
     283static inline unative_t read_msr(uint32_t msr)
    307284{
    308285        uint32_t ax, dx;
     
    317294}
    318295
     296
    319297/** Enable local APIC
    320298 *
     
    322300 *
    323301 */
    324 NO_TRACE static inline void enable_l_apic_in_msr()
     302static inline void enable_l_apic_in_msr()
    325303{
    326304        asm volatile (
     
    330308                "orl $(0xfee00000),%%eax\n"
    331309                "wrmsr\n"
    332                 ::: "%eax", "%ecx", "%edx"
    333         );
     310                ::: "%eax","%ecx","%edx"
     311        );
     312}
     313
     314static inline uintptr_t * get_ip()
     315{
     316        uintptr_t *ip;
     317       
     318        asm volatile (
     319                "mov %%rip, %[ip]"
     320                : [ip] "=r" (ip)
     321        );
     322       
     323        return ip;
    334324}
    335325
     
    339329 *
    340330 */
    341 NO_TRACE static inline void invlpg(uintptr_t addr)
     331static inline void invlpg(uintptr_t addr)
    342332{
    343333        asm volatile (
     
    352342 *
    353343 */
    354 NO_TRACE static inline void gdtr_load(ptr_16_64_t *gdtr_reg)
     344static inline void gdtr_load(ptr_16_64_t *gdtr_reg)
    355345{
    356346        asm volatile (
     
    365355 *
    366356 */
    367 NO_TRACE static inline void gdtr_store(ptr_16_64_t *gdtr_reg)
     357static inline void gdtr_store(ptr_16_64_t *gdtr_reg)
    368358{
    369359        asm volatile (
     
    378368 *
    379369 */
    380 NO_TRACE static inline void idtr_load(ptr_16_64_t *idtr_reg)
     370static inline void idtr_load(ptr_16_64_t *idtr_reg)
    381371{
    382372        asm volatile (
     
    390380 *
    391381 */
    392 NO_TRACE static inline void tr_load(uint16_t sel)
     382static inline void tr_load(uint16_t sel)
    393383{
    394384        asm volatile (
     
    398388}
    399389
    400 #define GEN_READ_REG(reg) NO_TRACE static inline unative_t read_ ##reg (void) \
     390#define GEN_READ_REG(reg) static inline unative_t read_ ##reg (void) \
    401391        { \
    402392                unative_t res; \
     
    408398        }
    409399
    410 #define GEN_WRITE_REG(reg) NO_TRACE static inline void write_ ##reg (unative_t regn) \
     400#define GEN_WRITE_REG(reg) static inline void write_ ##reg (unative_t regn) \
    411401        { \
    412402                asm volatile ( \
     
    435425GEN_WRITE_REG(dr7)
    436426
    437 extern void asm_delay_loop(uint32_t);
    438 extern void asm_fake_loop(uint32_t);
    439 
    440 extern uintptr_t int_0;
    441 extern uintptr_t int_1;
    442 extern uintptr_t int_2;
    443 extern uintptr_t int_3;
    444 extern uintptr_t int_4;
    445 extern uintptr_t int_5;
    446 extern uintptr_t int_6;
    447 extern uintptr_t int_7;
    448 extern uintptr_t int_8;
    449 extern uintptr_t int_9;
    450 extern uintptr_t int_10;
    451 extern uintptr_t int_11;
    452 extern uintptr_t int_12;
    453 extern uintptr_t int_13;
    454 extern uintptr_t int_14;
    455 extern uintptr_t int_15;
    456 extern uintptr_t int_16;
    457 extern uintptr_t int_17;
    458 extern uintptr_t int_18;
    459 extern uintptr_t int_19;
    460 extern uintptr_t int_20;
    461 extern uintptr_t int_21;
    462 extern uintptr_t int_22;
    463 extern uintptr_t int_23;
    464 extern uintptr_t int_24;
    465 extern uintptr_t int_25;
    466 extern uintptr_t int_26;
    467 extern uintptr_t int_27;
    468 extern uintptr_t int_28;
    469 extern uintptr_t int_29;
    470 extern uintptr_t int_30;
    471 extern uintptr_t int_31;
    472 extern uintptr_t int_32;
    473 extern uintptr_t int_33;
    474 extern uintptr_t int_34;
    475 extern uintptr_t int_35;
    476 extern uintptr_t int_36;
    477 extern uintptr_t int_37;
    478 extern uintptr_t int_38;
    479 extern uintptr_t int_39;
    480 extern uintptr_t int_40;
    481 extern uintptr_t int_41;
    482 extern uintptr_t int_42;
    483 extern uintptr_t int_43;
    484 extern uintptr_t int_44;
    485 extern uintptr_t int_45;
    486 extern uintptr_t int_46;
    487 extern uintptr_t int_47;
    488 extern uintptr_t int_48;
    489 extern uintptr_t int_49;
    490 extern uintptr_t int_50;
    491 extern uintptr_t int_51;
    492 extern uintptr_t int_52;
    493 extern uintptr_t int_53;
    494 extern uintptr_t int_54;
    495 extern uintptr_t int_55;
    496 extern uintptr_t int_56;
    497 extern uintptr_t int_57;
    498 extern uintptr_t int_58;
    499 extern uintptr_t int_59;
    500 extern uintptr_t int_60;
    501 extern uintptr_t int_61;
    502 extern uintptr_t int_62;
    503 extern uintptr_t int_63;
     427extern size_t interrupt_handler_size;
     428extern void interrupt_handlers(void);
    504429
    505430#endif
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