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  • kernel/arch/amd64/include/interrupt.h

    rc0e9f3f rd99c1d2  
    3838#include <typedefs.h>
    3939#include <arch/pm.h>
    40 #include <trace.h>
    4140
    42 #define IVT_ITEMS  IDT_ITEMS
    43 #define IVT_FIRST  0
     41#define IVT_ITEMS               IDT_ITEMS
     42#define IVT_FIRST               0
    4443
    45 #define EXC_COUNT  32
    46 #define IRQ_COUNT  16
     44#define EXC_COUNT               32
     45#define IRQ_COUNT               16
    4746
    48 #define IVT_EXCBASE   0
    49 #define IVT_IRQBASE   (IVT_EXCBASE + EXC_COUNT)
    50 #define IVT_FREEBASE  (IVT_IRQBASE + IRQ_COUNT)
     47#define IVT_EXCBASE             0
     48#define IVT_IRQBASE             (IVT_EXCBASE + EXC_COUNT)
     49#define IVT_FREEBASE            (IVT_IRQBASE + IRQ_COUNT)
    5150
    52 #define IRQ_CLK       0
    53 #define IRQ_KBD       1
    54 #define IRQ_PIC1      2
    55 #define IRQ_PIC_SPUR  7
    56 #define IRQ_MOUSE     12
    57 #define IRQ_DP8390    9
     51#define IRQ_CLK                 0
     52#define IRQ_KBD                 1
     53#define IRQ_PIC1                2
     54#define IRQ_PIC_SPUR            7
     55#define IRQ_MOUSE               12
     56#define IRQ_DP8390              9
    5857
    59 /* This one must have four least significant bits set to ones */
    60 #define VECTOR_APIC_SPUR  (IVT_ITEMS - 1)
     58/* this one must have four least significant bits set to ones */
     59#define VECTOR_APIC_SPUR        (IVT_ITEMS - 1)
    6160
    6261#if (((VECTOR_APIC_SPUR + 1) % 16) || VECTOR_APIC_SPUR >= IVT_ITEMS)
     
    6463#endif
    6564
    66 #define VECTOR_DEBUG              1
    67 #define VECTOR_CLK                (IVT_IRQBASE + IRQ_CLK)
    68 #define VECTOR_PIC_SPUR           (IVT_IRQBASE + IRQ_PIC_SPUR)
    69 #define VECTOR_SYSCALL            IVT_FREEBASE
    70 #define VECTOR_TLB_SHOOTDOWN_IPI  (IVT_FREEBASE + 1)
    71 #define VECTOR_DEBUG_IPI          (IVT_FREEBASE + 2)
     65#define VECTOR_DEBUG                    1
     66#define VECTOR_CLK                      (IVT_IRQBASE + IRQ_CLK)
     67#define VECTOR_PIC_SPUR                 (IVT_IRQBASE + IRQ_PIC_SPUR)
     68#define VECTOR_SYSCALL                  IVT_FREEBASE
     69#define VECTOR_TLB_SHOOTDOWN_IPI        (IVT_FREEBASE + 1)
     70#define VECTOR_DEBUG_IPI                (IVT_FREEBASE + 2)
    7271
    7372/** This is passed to interrupt handlers */
    7473typedef struct istate {
    7574        uint64_t rax;
    76         uint64_t rbx;
    7775        uint64_t rcx;
    7876        uint64_t rdx;
    7977        uint64_t rsi;
    8078        uint64_t rdi;
    81         uint64_t rbp;
    8279        uint64_t r8;
    8380        uint64_t r9;
    8481        uint64_t r10;
    8582        uint64_t r11;
    86         uint64_t r12;
    87         uint64_t r13;
    88         uint64_t r14;
    89         uint64_t r15;
    90         uint64_t alignment;     /* align rbp_frame on multiple of 16 */
    91         uint64_t rbp_frame;     /* imitation of frame pointer linkage */
    92         uint64_t rip_frame;     /* imitation of return address linkage */
    93         uint64_t error_word;    /* real or fake error word */
     83        uint64_t rbp;
     84        uint64_t error_word;
    9485        uint64_t rip;
    9586        uint64_t cs;
    9687        uint64_t rflags;
    97         uint64_t rsp;           /* only if istate_t is from uspace */
    98         uint64_t ss;            /* only if istate_t is from uspace */
     88        uint64_t stack[]; /* Additional data on stack */
    9989} istate_t;
    10090
    10191/** Return true if exception happened while in userspace */
    102 NO_TRACE static inline int istate_from_uspace(istate_t *istate)
     92static inline int istate_from_uspace(istate_t *istate)
    10393{
    10494        return !(istate->rip & 0x8000000000000000);
    10595}
    10696
    107 NO_TRACE static inline void istate_set_retaddr(istate_t *istate,
    108     uintptr_t retaddr)
     97static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)
    10998{
    11099        istate->rip = retaddr;
    111100}
    112 
    113 NO_TRACE static inline unative_t istate_get_pc(istate_t *istate)
     101static inline unative_t istate_get_pc(istate_t *istate)
    114102{
    115103        return istate->rip;
    116104}
    117 
    118 NO_TRACE static inline unative_t istate_get_fp(istate_t *istate)
     105static inline unative_t istate_get_fp(istate_t *istate)
    119106{
    120107        return istate->rbp;
    121108}
    122109
    123 extern void (* disable_irqs_function)(uint16_t);
    124 extern void (* enable_irqs_function)(uint16_t);
     110extern void (* disable_irqs_function)(uint16_t irqmask);
     111extern void (* enable_irqs_function)(uint16_t irqmask);
    125112extern void (* eoi_function)(void);
    126113
     114extern void decode_istate(int n, istate_t *istate);
    127115extern void interrupt_init(void);
    128 extern void trap_virtual_enable_irqs(uint16_t);
    129 extern void trap_virtual_disable_irqs(uint16_t);
     116extern void trap_virtual_enable_irqs(uint16_t irqmask);
     117extern void trap_virtual_disable_irqs(uint16_t irqmask);
     118/* AMD64 - specific page handler */
     119extern void ident_page_fault(int n, istate_t *istate);
    130120
    131121#endif
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